The voltage rating is for the resistor series typically and specifies the maximum peak voltage you can apply without danger of damaging the resistor due to corona, breakdown, arcing, etc.
The power rating is completely independent of the voltage rating. It specifies the maximum steady state power the package is able to dissipate under given conditions.
You have to conform to both specs. If placing the maximum voltage across the resistor results in more power than the spec allows you have to reduce the voltage until you meet the spec. Likewise you can't increase the voltage above the rating just because you're not hitting the maximum power limit.
A typical transformer datasheet will specify a full-load voltage, which is the RMS secondary voltage measured when the secondary is delivering its rated RMS current. Is it correct to assume that this VA rating only applies when the secondary voltage and current are both sinusoidal?
Yes only sinewaves.
> In other words, how does the shape of the current waveform affect the transformer V-I ratings?
For pulse loads derate VA rating at least 30% due to increased RMS current (heating) per average output current which gives more rise in temperature. Often 10% duty cycle pulses for 10% Voltage ripple uses RC=T=16x/f (f= pulse rate , line rate is doubled after full bridge)
main Reason: the copper losses will be Pcu=Ipk^2*DCR, for a copper DC resistance DCR. Thus a large cap loaded DC bridge will increase the losses and rise in temp. more than a sine current load for same RMS output power.
2nd reason THe output caps charge just before peak voltage and stop at peak voltage. Thus with 10% ripple that means the current is an amplified sine pulse that only starts near 80 deg and stops at 90 deg at a peak level of 10x the decay current into the load, so it has a 10% pulse width with very fast rise time and 10% sine peak shape, with more than 10 harmonics of 2x the line frequency (even and odd) which for laminated steel with high mu, can result in eddy current losses. Load balance affects VAR utilization on tapped transformers.
3rd reason* if the output is center-tapped and 1 diodes used on each leg, AND only loaded on one leg, say V+ and not V- then this results in offset DC current in the shared core and reduces margin to saturation with DC current flowing thru the core secondary ( from half-wave loading) THus primary saturation can occur sooner if one assumed incorrectly they could get full VA on half wave rectified V+. The VA output must be shared with load balance on each winding to utilize the
power.
There are some excitation losses from the primary inductance creating a reactive current about 10% of rated current in order to activate the mutual coupling.
How would one go about determining the proper current rating for a linear power supply transformer?
Use VA rating VA/V*70%=Imax dc max and derate further for lower than 50'C winding temp rise even if sine wave.
My immediate thought would be to approximate the current through the filter capacitor as a periodic sawtooth pulse and find the RMS value of the pulse waveform, then add maybe 50% to account for the fact that the transformer supplies current to the load while the diode is conducting and also to provide a decent safety factor. Is there a better way of doing this?
I once used 10% ripple = 16/f and derate VA by 40%. Now I use SMPS.
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If you draw, say, 5 A of peak current on the transformer secondary, then for a 10:1 transformer, you'd be drawing 50 A of peak current on the primary. How is standard grid power able to handle such high repetitive peak current spikes without blowing a breaker?
Breakers near trip Current rating respond in a minute or few. RC low pass filter T= line f/8 thus ~1/10 second so the pulse is too fast to thermally affect breaker or fuse.
Normally Temp rise is the limiting factor with several causes that causes. We expect Voltage output to rise 40% with no load due to sine pk/avg and another 10% due to secondary DCR losses so V_no load will be ~ 50% more than avg.DC at max permissable load. THis makes it very inefficient compared to HF SMPS due to the much lower duty cycle charge periods and long discharge periods, so much greater storage energy and size of XFMR, Cap are necessary.
THere are books by Dr./Prof Keith Billings with easy nomographs that make linear supply design and SMPS design as easy as a recipe for making Won Ton soup. I as a client at Burroughs Inc worked, with him when he was Eng Mgr of Hammond Power Supplies in Canada ca. 80's. He is now in Colorado I believe.
Best Answer
The main reason is for power calculations. The VRMS value is that value which will give the same heating effect as the same numerical value in DC. This then means that we can use the standard formulas \$ V = IR \$, \$ P = I^2R \$ and \$ P = \frac {V^2} R \$ in our calculations.
A typical dimmer waveform. The relationship between phase angle delay and resultant RMS voltage is graphed on the right. Image source: Dimmers for LEDs.*
Remember that the RMS value will work with non-sinusoidal waveforms too whereas the peak voltage will tell you nothing.
I think I've covered that.
Devices using rectifiers usually generate non-sinusoidal current waveforms. Think about a mains or transformer supply charging a capacitor through a rectifier: no current will flow until the supply voltage exceeds the capacitor voltage so the current waveform will appear as a pulse when V is close to maximum.
If you want to calculate power then you need to average the product of the voltage and current over time.
For the mathematics.
Yes, so the crest factor (ratio between peak and RMS values) will have to be considered in any design.