Electronic – voltage leak to MOSFET gate? Fried

No, also for P-channel MOSFETs it's charging them. The confusion probably stems from the voltage you see at the lower side, which goes to ground (or near it). But that voltage isn't important, a capacitor's charge is determined by the voltage across it:

\$ Q = \Delta V \cdot C \$

So decreasing the gate voltage increases the gate-source voltage difference, which increases the charge of the capacitor.

When you switch off T1, there's current flowing from +12 V through R2 to the gate to discharge it's capacitance.

edit re the update of your question dd. 2012-07-09(*)
Turning off means that you discharge the gate to +5 V, and this happens by current through R2 and D3. So you bypass R? but R2 is still the limiting factor. A solution would be to swap R2 and T1, so that there's more current/less resistance to discharge the gate than to charge it.

\$ \$

_{(*) I'm using the ISO 8601 standard date format here. We have user from all over the world and for some 9/07 means 9 July, for others it's 7 September. ISO 8601 is unambiguous.}

The circuit makes perfect sense.

Now answering your questions:

1. Yes, Vbase maximum is 6 V, but that is V_BE, and you are measuring from base to GND, which is here Vbc, right? Please note that BJT is a current-controlled device, so adjust Rbase to achieve the gain based on the Ib/Ic curve (beta gain).

2. Q1 is causing this to happen, since when MCU is high, Q1 turns on driving the totem pole (or emitter follower pair) to Gnd, so the PNP Q2 will conduct. That will drive the MOSFET gate to GND, turning it off. So at this point the LEDs are just connected to Vcc and they will be OFF, and vice versa!