Electronic – What are the advantages and disadvantages of thinner PCB thickness (<1.6 mm or 0.063'')

I'm late to the game, but I'll give it a shot:

1- It appears that for a lot of manufacturing houses, 105 microns is as high as its gets. Is that correct or are higher thickness possible?

Some fab shops can plate up internal layers. The tradeoff is usually larger tolerance in the overall thickness of the board, e.g. 20% instead of 10%, higher cost, and later ship dates.

2- Can the copper in the inner layers be as thick as the copper at the top and bottom of the board?

Yes, though inner layers do not dissipate heat as well as outer layers, and if you're using impedance control, they are more likely to be striplines than microstrips (i.e. using two reference planes instead of one). Striplines are harder to get a target impedance; microstrips on the outer layers can just be plated up until impedance is close enough, but you can't do that with internal layers after the layers are laminated together.

3- If I'm pushing current through several board layers, is it necessary or preferred (or even possible?) to distribute the current as equally as possible throughout the layers?

Yes, it is preferred, but it is also difficult. Usually this is only done with the ground planes, by way of stitching vias and mandating that holes and vias connect to all planes of the same net.

4- About the IPC rules regarding trace widths: Do they hold up in real life? For 30 Amps and a 10 degrees temperature rise, if I'm reading the graphs correctly, I need about 11mms of trace width on the top or bottom layer.

The new IPC standard on current capacity (IPC-2152) holds up well in real life. However, never forget that the standard does not account for nearby traces also generating comparable amounts of heat. Finally, be sure to check voltage drops on your traces as well to make sure they are acceptable.

Also, the standard does not account for increased resistance due to skin effect for high-frequency (e.g. switching power loop) circuits. Skin depth for 1 MHz is about the thickness of 2 oz. (70 µm) copper. 10 MHz is less than 1/2 oz. copper. Both sides of the copper are only used if return currents are flowing in parallel layers on both sides of the layer in question, which is usually not the case. In other words, current prefers the side facing the path of the corresponding return current (usually a ground plane).

5- When connecting multiple layers of high current traces, what's the better practice: Placing an array or grid of vias close to the current source, or placing the vias throughout the high current trace?

It's best (and usually easier from a practical point of view) to spread the stitching vias out. Also, there is an important thing to keep in mind: mutual inductance. If you place vias that carry current flowing in the same direction too close to each other, there will be mutual inductance between them, increasing the total inductance of the vias (possibly making a 4x4 grid of vias look like a 2x2 or 1x2 at decoupling capacitor frequencies). The rule of thumb is to keep these vias at least one board thickness from each other (easier) or at least twice the distance between the planes the vias are connecting (more math).

Finally, it is still wise to keep the board's layer stackup symmetric to prevent board warpage. Some fab shops may be willing to go to the extra effort to fight the warpage from an asymmetric stackup, usually by increasing lead times and cost since they have to take a couple tries at it to get it right for your stackup.

Good layout and grounding seems to be poorly understood out there so religion finds a foothold. You are right, there is really very little reason to use both the top and bottom of a two layer board for ground.

What I usually do for two layer boards is to put as much of the interconnects as possible on the top layer. This is where the pins of the parts are already anyway, so is the logical layer to use to connect them. Unfortunately you usually can't route everything on a single layer. Paying attention and thinking carefully about part placement will help with this, but in the general case it is not possible to route everything in one plane. I then use the bottom plane for short "jumpers" only when needed to make the routing work. The bottom plane is otherwise ground.

The trick is to keep these jumpers on the bottom layer short and not abutting each other. The metric of how good a ground plane is left over is the maximum linear dimension of a hole, not the number of holes. A bunch of short 200 mil traces scattered about won't keep the ground plane from doing its job. However, the same number of 200 mil traces clumped together to make one island a inch accross is a much bigger disruption. Basically, you want the ground to flow around all the little disruptions.

Set the auto router cost for the bottom layer high and don't penalize it much for vias. This will automatically put most of the interconnects on the top layer. Unfortunately, the auto-router algorithms I have seen can't seem to be tweaked for not clumping the jumpers. In Eagle, for example, there is the hugging parameter. Even if you turn this off, you still get clumped jumpers. Let the auto router do the grunt work, then you clean things up afterwards. Sometimes you can spot a case where a little re-arrangement can eliminate a jumper altogether. Most of your time, however, will be spent moving the jumpers apart to not make large islands.

As for power planes, that's mostly silly religion. Route the power just like any other signal, although in this case you have to consider the voltage drop due to the trace resistance, since power traces presumably handle significant current. Fortunately even 1 oz copper traces on a PCB are quite low resistance. You can make the power traces 20 mil or whatever instead of 8 mils for signal traces. In any case, the point is that the DC resistance matters but it is usually not much of a issue unless you have a high current design.

The AC impedance isn't all that relevant, which the religious folks don't seem to get. This is because the power feed is locally bypassed to the ground plane at each point of use. If you have a good ground plane, you don't need separate power planes for most ordinary designs, just good bypassing at each power lead of each part. The bypass cap connects directly between the power and ground pins, then there is a via right at the ground pin to connect to the ground plane on the bottom layer.

The high frequency power loop current of a part should go out the power pin, thru the bypass cap, and back in to the ground pin without ever running accross the ground plane. This means you don't use a separate via for the ground side of the bypass cap. Connect it directly to the ground pin on the top side, then connect that net to the ground plane with a via at a single point. This technique will help a lot with RF emissions and cleanliness in general.