Such circuits may be usable for motor control, but I really wouldn't recommend one for audio applications. A typical PWM will behave most linearly when it's near 50% duty cycle; linearity falls off badly at the extremes. In a class D amplifier, a zero-volt input signal is represented by a 50%-duty-cycle output. As a consequence the zero-crossing point, which is where the ear is most sensitive to distortion, is where the circuit behaves the most cleanly. If you try to use an H-bridge simply for direction switching and a separate transistor to modulate the output amplitude, it will be very difficult to achieve any sort of smooth behavior near the crossover point. This will be especially true if one is driving a reactive load where voltage and current are not in phase. The behavior of a class D amplifier when voltage and current are out of phase will be relatively clean and consistent when the voltage crosses from positive to negative. By contrast, in a circuit such as you describe, the transition from positive to negative voltage will trigger a sudden change in how the circuit handles the currents that are flowing in the load at the time of the change. With a practical load, such currents are likely to exist and to be significant. An abrupt change in them will almost certainly generate audible crossover distortion.
accounting for the current sign change, how many of the 100 turn-ons
imply switching losses?
Every time a FET switches on or off there will be a switching loss as the voltage and current changes, since during the transition the FET is operating in linear mode. The only exception is if there is no voltage and current to switch.
With bipolar SPWM both upper and lower FETs are turned on and off alternately to create a PWM sine wave, and this wave is applied for the entire motor rotation. Both FETs are always switching voltage and current, so every transition will cause a switching loss in both transistors.
However all switching losses are not necessarily equal. During each half of the sine wave only one FET (eg. Q1) normally supplies power to the motor. When it is switched off the other FET (Q2) recirculates current through the motor winding. Back-emf caused by winding inductance creates a reverse voltage when Q1 switches off, which is limited to ~0.7V below ground by the body diode in Q2.
The body diode has fairly high conduction loss, but when Q2 is turned on shortly afterwards it only has to switch 0.7V, so the Drain-Source switching loss is low (much lower than for Q1, which has to switch the full supply voltage). When Q2 is turned off again at the end of its PWM cycle the voltage will only go back to -0.7V, so again the Drain-Source switching loss is low.
If unipolar SPWM is used then PWM is only applied to each FET for one half of the sine wave, so the number of Drain-Source switching events is halved. However the other FET's body diode now has to handle all the recirculating current, which causes extra conduction losses due to the 0.7V drop.
Best Answer
It implies that there are too many variables, so they won't guarantee that you get a certain performance.
The main variable with switching losses is the speed at which to turn it on/off and the frequency of switching. The speed of switching will depend on how much current you can drive the gate with, the inductance of the traces and pins, and the capacitance of the gate itself.
Of those variables, it is only the gate capacitance that is under control of the MOSFET manufacturer and so it is often just the gate cap that is listed in the datasheet.
Basically, for all MOSFET datasheets it should say: "Switching Losses: Your Mileage May Vary (typ)".