If you're familiar with double-subscript notation, you have your answer at hand.
For example, the base-emitter voltage \$v_{BE} \$ is positive when the base is more positive than the emitter, i.e., for \$v_{BE}\$, the \$ +\$ sign is at the base node.
Likewise, the emitter-base voltage \$v_{EB} \$ is positive when the emitter is more positive than the base, i.e., for \$v_{EB}\$, the \$ +\$ sign is at the emitter node.
With that in mind, for NPN transistors, the equations are written in terms of \$v_{BE}, v_{CB}, v_{CE}\$. By KVL, \$v_{BE} + v_{CB} = v_{CE}\$ so, if you know any two, you know the third.
Now, remembering the structure of NPN transistor, it is the case that the base-emitter junction is forward biased when \$v_{BE}\$ is positive and the base-collector junction is reverse biased when \$v_{CB}\$ is positive.
The cutoff region is formally defined as the condition that both junctions are reverse biased: \$v_{BE}< 0, v_{CB}>0\$
For PNP transistors, simply reverse the order of the subscripts and everything follows through.
There are, in principle, two ways for solving the task. Please understand that I do not intent to present the solution for you. However, I will try to give you some hints to find the solution by yourself.
1.) Application of the superposition theorem
Supplementing the transistor Pi-model with the external resistors results in a circuit which contains two sources: A voltage source Vin and the controlled current source of the Pi-model. Thus, after applying the superposition principle you get two equations for finding the two unknown quantities: Vo/Vin and Vbe. (Please note that the transconductance of the Pi-model can be expressed by the two known values for beta and Rpi).
2.) Application of the general gain formula for negative feedback
The closed-loop gain is Vo/Vin=Acl=AoHf/(1-AoHr). (Note that Ao will be negative).
Gain without feedback Ao=Vout/V(base) (simple gain formula for common emitter);
Forward (damping)factor Hf=V(base)/Vin for Vout=0;
Return (feedback) factor Hr=V(base)/Vout for Vin=0.
Both factors are calculated using simple voltage divider rules.
Best Answer
First, remember that the load line drawing solves a particular set of equations. Where the lines cross gives the the operating point for that combination of power supply, load resistor, and transistor base current.
Second, it's correct that there is no characteristic curve for the BJT that goes through the region you circled. The reason is conservation of energy. If the BJT operated in that region, it would mean that the BJT was delivering energy to the circuit, rather than taking energy provided by the power supply and turning it into heat. Since a BJT doesn't contain a reserve of energy that can be released in steady-state conditions, it simply can't operate in that region.
There is, however, probably a small region right near the origin where the transistor characteristic curves do pass through quadrant IV of the graph. Consider this circuit:
simulate this circuit – Schematic created using CircuitLab
This is essentially taking the resistor/power-supply load line and moving it down for the case where Vcc goes to 0. In this case, the base-collector junction will be forward biased and some power from the base bias supply will be delivered to the load resistor. And the load line will give a solution in quadrant IV, but very close to the origin.
If we were talking about a MOSFET instead of a BJT, even this solution would not be possible, since there's no way for current to transfer from the gate side to the drain side of the FET.