mosfetmosfet-driverpowerpower electronics
I need to drive a MOSFET IPW90R120C3 from Infineon
here the Specification of MOSFET
VDS @ TJ=25°C 900 V
Rdson @ TJ=25°C : 0.12ohm
Qg = 270nC
Specification of driver IR2110
Isource: 2A
Isink : 2A
VOUT 10 - 20V
ton/off (typ.) 120 & 94 ns
Driver supply : 15V
The switch frequency Fsw= 50KH
what the best way to calculate the resistance Rg to drive proprely the MOSFET ?
best regards
After receiving IRF540N from a reputable seller I can definitely confirm that the ones I was originally using are counterfeits.
After replacing fake one with a genuine one I got Vds=85mV on the red channel. What I was not expecting though is that the genuine FET got hot after a minute or so. And then I realized that those FETs are not generating much heat themselves but rather get heated up (and quite a lot) from the breadboard and the wires (Connor Wolf mentioned it). Short wires connecting FET's source to GND are screaming hot when this is in full ON state. Moving FETs off the breadboard confirmed that the source of the heat was the breadboard/wires. Fake one was getting hot but I could actually cool it down just by touching it. Genuine one was somewhere between the room temperature and luke warm. Btw. measuring Vds directly on FET pins vs measuring it 1cm away on the breadboard made around 200mV difference (85mV on pins, 300mV on breadboard).
Here are some pictures, fake on the left, genuine on the right and manufacturer's part marking on the bottom:
Although there are more IRF package markings possible as shown in this document I could not find any similar to the fake one (which only supports that this is a counterfeit). Also the cutouts on the top of the back plate are rectangular vs round on the genuine and in the spec.
Thank you guys for all your comments! The circuit now works as expected (PWM included).
The IR2112 uses a charge pump (C2 and D1) to increase Gate drive voltage. For this to work properly you must apply PWM to HIN, which keeps C2 charged up.
Each time the FET turns on it pulls the load voltage high. Since C2 is already charged up to nearly 15V, and D1 stops it from discharging into the 15V supply, the boost voltage at VB will go up to almost 15V above the FET's Drain voltage (ie. to about 115V). The driver then switches between this boost voltage and VS, providing close to 15V Gate drive to the FET even though it is way above VC. C2 will loose some charge through the gate drive circuit, but when the FET is turned off again (during PWM off time) it is recharged through the load (R4).
If you hold HIN high continuously then C2 will continue to discharge through R1 and R2. Eventually the drive voltage will drop below the FETs threshold voltage and it will start to turn off, then boost voltage will drop and you will be left with only the 15V from VS. The load voltage will drop even lower because the IRF840 needs about 6V to turn on.
Another potential problem with your circuit is that C2 is being discharged through R1 and R2 almost as fast as it is being charged through R4. Over many PWM cycles the average voltage on C2 will drop, reducing Gate drive. At 50% PWM or above the drive voltage might drop below the FETs threshold voltage, causing it to turn off too soon. This can be fixed by either increasing the value of R2 or reducing the value of R4.
Best Answer
"best way" comes downto what you are trying to achieve?
Switching is all about charge transfer. You need to transfer 270nC worth of charge in (or out) of the gate region to turn the device on (or off). It is also about charging up the relevant capacitance.
\$Q_{gs} \Rightarrow Q_{gd} \Rightarrow Q_g\$
The turn on of the device can be split onto two region's
The actual turn on characteristics (and equally turn-off) is split into three regions, (charging to threshold, charging through the millar, charging to saturation) but without a detailed charge plot of the millar plateau it is more of a talking point
\$ \Delta V = (V_{end} - V_{start})(1 - \frac{1}{e^{\frac{t}{\tau}}})\$
\$ t = RC ln(1 - \frac{\Delta V}{ V_{end} - V_{start}}) \$
Period 1
\$V_{gg}\$ is 10V = \$V_{end}\$
\$V_{0}\$ is 0V = \$V_{start}\$
\$V_{th}\$ is 3V = \$\Delta V\$
C = 6.8nF (from \$C_{iss}\$)
From this a 1st pass approximation of \$R_g\$ can be done based upon a required delay time
Period 2
\$V_{gg}\$ is 10V = \$V_{end}\$
\$V_{th}\$ is 3V = \$V_{start}\$
\$V_{gg} -V_{th} \$ is 7V = \$\Delta V\$
\$Q_g\$ is 270nC -> \$C_g = Q_g/Vg = 27nF\$
C = 20.2nF (from \$C_g - C_{iss}\$)
This will facilitate deriving a gate resistance for a given rise time. This value is of greater importance than delay time.
There are three other considerations with regards to gate drive
Power
\$P_{drv} = Q_g f_{in} \Delta V_g\$
The faster you want to switch, the more power it will take
Current
\$\hat{I_{out}} = \frac{\Delta V_g}{R_{g\_min}}\$
The lowest gate resistor is governed by the output current capability of your driver
Stability
\$R_{g\_min} = 2 \sqrt(\frac{L_g}{Cg}) \$
To minimise creating a pierce oscillator, the damping factor associated with the L-C circuit must fulfil the damping condition