Electronic – When to use Enig vs HASL vs Silver vs

My rule of thumb is something like:

(a) Am I putting together something that is highly sensitive to parasitic induction and capacitance, such as a switching power supply or GHz radio transmitter or receiver; or do I need some IC that only comes in a fine-pitch SMT package? I don't have a choice. I am forced to use a custom PCB. (Sometimes you can get an off-the-shelf demo board or adapter board for just that one section, or make a custom PCB for just that one section, and prototype the rest of the system using a quicker and lower-cost technique).

(b) Am I rigging up a single quick experiment to test something for a few minutes? Use a solderless breadboard: it's the quickest. Alas, for longer-term use, or if you try to ship it any significant distance, wires and components inevitably work loose, causing frustration.

(c) Am I rigging up want to rig up one or two devices and expect to use it (sporadically or continuously) for over a month? Or do I expect it to still work after shipping it to another location? Use wire-wrap or soldered wires (or both) on some prototyping board (stripboard, perfboard, etc.). Alas, even though any one wire connection can be placed and soldered (or placed and wire-wrapped) in a few seconds, it seems to take a long time build each board (compared to custom PCB or solderless breadboard), and any human placing lots of wires will inevitably put some wires in the wrong place, causing frustration. (Many SMT devices can be used on such a board).

(d) Do I want dozens of identical devices, at minimum the total time and cost? Use a custom PCB. Alas, a custom PCB has much higher up-front costs, which eat up your savings in assembly time and in some cases part costs unless you make lots of them. Alas, a custom PCB usually takes longer to get the first functioning prototype than other methods -- often requiring 2 or more "spins" -- although, once production is set up, it's much faster and less error-prone per device.

2) I highly recommend AGAINST cutting ground anywhere near high-speed signals. Stray capacitance really doesn't have too much of an effect on digital electronics. Usually stray capacitance kills you when it acts to create a parasitic filter at the input of an op amp.

In fact, it is highly recommended to run your high-speed signals directly overtop of an unbroken ground plane; this is called a "microstrip". The reason is that high frequency current follows the path of least inductance. With a ground plane, this path will be a mirror image of the signal trace. This minimizes the size of the loop, which in turn minimizes radiated EMI.

A very striking example of this can be seen on Dr. Howard Johnson's web site. See figures 8 and 9 for an example of high-frequency current taking the path of least inductance. (in case you didn't know, Dr. Johnson is an authority on signal integrity, author of the much lauded "High-Speed Digital Design: A Handbook of Black Magic")

It's important to note that any cuts in the ground plane underneath one of these high-speed digital signals will increase the size of the loop because the return current must take a detour around your cutout, which leads to increased emissions as well. You want a totally unbroken plane underneath all your digital signals. It's also important to note that the power plane is also a reference plane just like the ground plane, and from a high-frequency perspective these two planes are connected via bypass capacitors, so you can consider a high-frequency return current to "jump" planes near the caps.

3) If you have a good ground plane, there's pretty much no reason to use a guard trace. The exception would be the op amp I mentioned earlier, because you may have cut the ground plane underneath it. But you still need to worry about the parasitic capacitance of a guard trace. Once again, Dr. Johnson is here to help with pretty pictures.

4.1) I believe that multiple small vias will have better inductance properties since they are in parallel, versus one large via taking up approximately the same amount of space. Unfortunately I cannot remember what I read that led me to believe this. I think it's because inductance of a via is linearly inversely proportional to radius, but the area of the via is quadratically directly proportional to the radius. (source: Dr. Johnson again) Make the via radius 2x bigger, and it has half the inductance but takes up 4x as much area.