Electronic – Which CMOS SPICE model should I choose

The short answer is that you don't need 4 terminal FETs to build CMOS logic.

Some Background:

In a simple CMOS process, (P-type Wafer, N-Wells) the substrate contact is directly connected to the conductive wafer. This means that the body terminal of all NFETs are basically shorted together. A similar effect happens with the PFETs, although it isn't as absolute. They aren't shorted together to improve performance, but because it is cheaper and easier to manufacture.

This brings up a question: If we had to tie the body terminal of all NFET devices together, what voltage would we like it to be? For NFETs, the body-source and body-drain connections normally look like reverse-biased diodes. In order to maintain these diodes reverse-biased, the body voltage must be less than \$V_D \mbox{ or } V_S + 0.6\mbox{ Volts}\$. Typically this is done by tying the substrate/body to the most negative voltage present in the system. In digital systems, this is usually ground \$V_{SS}\$. The body terminal of PFETs is typically tied to the most positive voltage, or \$V_{DD}\$ for similar reasons.

For 3-terminal FETs, where the source and body have been internally shorted, the internal diodes will never be forward-biased if the source is always at a lower voltage than the drain. If you are stuck with 4-terminal transistors building discrete gates, it will work with the bodies connected to \$V_{SS}\$ and \$V_{DD}\$, and it will also work with the body shorted to the source.

The first comprehensive logic series was the TTL series 74xx. This used BJTs (Bipolar Junction Transistors). Later there came variants like the often used 74LSxx, where the "LS" stands for Low-power Schottky TTL. As the name implies these used less power than the rather power-hungry TTL, and were faster too. At the same time the CMOS 4000 series was developed. The "C" in CMOS stands for Complementary, meaning it's a combination of N-channel and P-channel MOSFETs. Their construction is simpler than TTL and they use far less power. Later standard CMOS developed into HCMOS, "H" for High-speed. Most 74LSxx types have been released as HCMOS in the 74HCxx series, or the 74HCTxx series, which is TTL compatible. Later more variants were developed, like Advanced CMOS (74ACxx).

Microcontrollers are built in HCMOS technology, so they use MOSFETs. AFAIK JFETs aren't used for logic ICs. The transistor you show in the picture is a BJT, which you can tell from the pin designation:

E = Emitter
B = Base
C = Collector

For a MOSFET the pins would be

S = Source
G = Gate
D = Drain

respectively.

Many ICs in the 74HCxx series were originally released in 14 or 16 pin DIL packages, which meant that they would fit four 2-input gates. With miniaturization (SMT) came the demand for smaller packages, even if they contained less gates. Several manufacturers offer single-gate and dual-gate versions of logic gates. For example, NXP has a 74LVC1G00 (single 2-input NAND) and a 74LVC2G00 (dual 2-input NAND) version of the classical 74HC00. 74LVCxx is yet another HCMOS technology. This page lists all NXP logic families.