As drain voltage is increased, the reverse bias across the drain-body junction also increases and thus the width of the junction should also increase which should deplete the channel length as well. So channel length modulation should occur at all voltages. Why does it occur only after saturation?
Electronic – Why does channel length modulation only occur in the saturation region
mosfetpn-junctionsemiconductorssolid-state-devicestransistors
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why is it that the required gate-body voltage to create this inversion layer is so much lower than the voltage required to overcome the reverse bias?
Or is it the proximity of the gate (and thus its field) to the area on the semiconductor it is trying to invert?
That's it. The gate is separated by mere 10's of nanometers from the channel by the gate oxide, whereas the channel length might be separated by µm's or more (depending on VDSmax), so the electric field from the gate is hundreds of times stronger.
How do enhancement mode mosfets even work: You are missing the creation of the "Inversion" layer. When you apply positive gate bias to an enhancement mode mosfet, the existing P channel near the gate contact starts to recede and you have your gate contact - depletion region - p substrate. If you keep going, the concentration of holes near the contact is so little, that you form, in affect a N region near the contact - A N channel now forms between the source and drain contacts.
So at this point, is you examine a cross section of the Enhancement mode mosfet, from source to drain you will see: N+ - N - N+. If you now look "down" you will see Gate - N - depletion - P.
Best Answer
The channel gets pinched-off only when the MOSFET reaches saturation, beyond which only channel length modulation has direct effect on the drain current. This is because channel length modulation reduces the effective channel length by \$\Delta L\$ afterwards.
For instance, in an NMOS, it enters saturation when \$V_{DS}\$ is increased and reaches the condition \$V_{DS} >= V_{Th}\$ . Channel gets pinched off at this moment. For further increase in \$ V_{DS}\$, channel length modulation comes into play, reducing the effective channel length to \$L-\Delta L\$. The drain current expression will therefore be: $$I_{DS} = K. \frac{W}{L-\Delta L}.(V_{GS}-V_{Th})^2$$ where \$ \Delta L \approx L.\lambda V_{DS} \$ , and \$ \lambda \$ is the channel length modulation parameter.
On triode/linear region of MOSFET, the channel is not pinched-off yet. Hence, \$\Delta L \approx 0\$ i.e., the effective channel length is still \$ L \$. So channel length modulation doesn't come into play yet until you increase the drain bias to the point that the MOSFET enters the saturation region, and the shortening of channel length is now obvious.
UPDATE:
Adding an illustration of channels at different MOSFET regions from my favorite text book: CMOS Digital Integrated Circuits by Kang and Leblebici