Electronic – Why to double reverse diodes in parallel to MOSFET

I'm not sure why you think BJTs are significantly slower than power MOSFETs; that's certainly not an inherent characteristic. But there's nothing wrong with using FETs if that's what you prefer.

And MOSFET gates do indeed need significant amounts of current, especially if you want to switch them quickly, to charge and discharge the gate capacitance — sometimes up to a few amps! Your 10K gate resistors are going to significantly slow down your transitions. Normally, you'd use resistors of just 100Ω or so in series with the gates, for stability.

If you really want fast switching, you should use special-purpose gate-driver ICs between the PWM output of the MCU and the power MOSFETs. For example, International Rectifier has a wide range of driver chips, and there are versions that handle the details of the high-side drive for the P-channel FETs for you.

Additional:

How fast do you want the FETs to switch? Each time one switches on or off, it's going to dissipate a pulse of energy during the transition, and the shorter you can make this, the better. This pulse, multiplied by the PWM cycle frequency, is one component of the average power the FET needs to dissipate — often the dominant component. Other components include the on-state power (I_D² × R_DS(ON) multiplied by the PWM duty cycle) and any energy dumped into the body diode in the off state.

One simple way to model the switching losses is to assume that the instantaneous power is roughly a triangular waveform whose peak is (V_CC/2)×(I_D/2) and whose base is equal to the transition time T_RISE or T_FALL. The area of these two triangles is the total switching energy dissipated during each full PWM cycle: (T_RISE + T_FALL) × V_CC × I_D / 8. Multiply this by the PWM cycle frequency to get the average switching-loss power.

The main thing that dominates the rise and fall times is how fast you can move the gate charge on and off the gate of the MOSFET. A typical medium-size MOSFET might have a total gate charge on the order of 50-100 nC. If you want to move that charge in, say, 1 µs, you need a gate driver capable of at least 50-100 mA. If you want it to switch twice as fast, you need twice the current.

If we plug in all the numbers for your design, we get: 12V × 3A × 2µs / 8 × 32kHz = 0.288 W (per MOSFET). If we assume R_DS(ON) of 20mΩ and a duty cycle of 50%, then the I²R losses will be 3A² × 0.02Ω × 0.5 = 90 mW (again, per MOSFET). Together, the two active FETs at any given moment are going to be dissipating about 2/3 watt of power because of the switching.

Ultimately, it's a tradeoff between how efficient you want the circuit to be and how much effort you want to put into optimizing it.

Flogging the FREDs

Voltage fed converters with transformer isolation will exhibit ringing in the secondary. Ringing is caused by parasitic inductances and capacitances in the circuit, with the dominant elements will being the transformer leakage inductance (\$ L_ {\text {Lk}}\$) and junction capacitance ( \$ C_j\$)of the bridge diodes. The diode data sheet shows \$ C_j\$ of 32pF. I'm going to make a naive guess at \$ L_ {\text {Lk}}\$ of 500nH, but it will have to be measured to really know. So, an LC of 500nH and 32pF is what must be snubbed.

Spike amplitude without snubbing will be \$ 2 n V_ {\text {in}}\$, where \$ n \$ is transformer turns ratio and the factor of 2 is what you get for a high Q resonance.

There are different types of voltage snubbers; Clamping, Energy transfer resonant, and Dissipative. The clamping and resonant types require more parts and some involvement of active switches which I think make them impractical for this case. So, I am only going to cover dissipative snubbers because they are the most simple and work well with passive switches (like diodes or synchronous rectifiers).

The form of dissipative snubber that I will cover is a series RC placed in parallel with each bridge diode.

Some facts about RC dampening snubbers:

• They are all about impedance matching. You don't get to choose the snubber resistor value \$ R_d\$. The parasitic LC determines that for you by characteristic impedance Zo.
• You do get to choose the value of the snubber cap \$ C_d\$. That's important since the cap value sets the snubber loss (\$ P_ {\text {Rd}}\$)as \$ C_d F V^2\$ . Where V is the pedestal voltage and F is switching frequency. The snubber cap must provide a low impedance at the LC resonance of the parasitics, so it needs to be several times \$ C_j\$.

Some guidelines, and what to expect with RC dampening snubbers:

• For \$ L_ {\text {Lk}}\$ of 500nH and \$ C_j\$ of 32pF, Zo will be 125Ohms. So, \$ R_d\$ would be 125 to match Zo. You may have to fine tune this a little since \$ C_j\$ is non-linear and falls off with reverse voltage.

• Choosing the snubber cap \$ C_d\$ : Choose \$ 3 C_j\leq C_d\leq 10 C_j \$ . Higher values in the range do provide better dampening. For example, \$ C_d\$ of \$ 3 C_j\$ will result in a peak diode voltage of \$ 1.5 n V_ {\text {in}}\$, while \$ C_d\$ of \$ 10 C_j\$ will result in a peak diode voltage of \$ 1.2 n V_ {\text {in}}\$.

• Dissipative snubber performance will not improve for \$ C_d\$ values greater than \$ 10 C_j\$.

Power loss \$ P_ {\text {Rd}}\$, with a pedestal voltage of 1250V and F of 50KHz.

• If \$ C_d\$ is \$ 3 C_j\$ or 100pF, \$ P_ {\text {Rd}}\$ = \$ C_d F V^2\$ or 7.8W.
• If \$ C_d\$ is \$ 10 C_j\$ or 330pF, \$ P_ {\text {Rd}}\$ = \$ C_d F V^2\$ or 25.8W.

\$ C_d\$ of \$ 10 C_j\$ gives the best dampening with peak voltage of 1.2 time the pedestal voltage, but you can save some power with smaller snubbing caps if you can stand the higher peak voltage.