Electronic – Why would a designer choose to use two AND’ed input shift register such as the 74HC164

If I understand your question correctly, it is important to understand that the device works in a couple separate stages.

1. The parallel inputs. These have latches that must be signaled to read the inputs and internally hold their state. Once latched, the signal on the input pins can change but the internal signals will be stable. (RCK)
2. The next step is where these internal signals are copied into the shift register. (\$\overline{\small \text{SLOAD}}\$)
3. The last step is shifting out the bits in the shift register (SCK)

If I understand the truth table and timing diagram in the datasheet correctly then the correct order of steps is the following:

1. Initialize the signals as follows RCK = low; \$\overline{\small \text{SLOAD}}\$ = high; \$\overline{\small \text{OE}}\$ = low; SCK = low;
2. Apply parallel signals to the inputs A~H
3. Clock the parallel signals into the latches by driving RCK high. RCK triggers on a rising edge. Drive RCK low, its inactive state.
4. Copy the contents of the input latches into the shift register by driving \$\overline{\small \text{SLOAD}}\$ low. \$\overline{\small \text{SLOAD}}\$ is active low. Drive \$\overline{\small \text{SLOAD}}\$ high again, its inactive state.
5. Read pin Q_H on your MCU
6. Apply a clock pulse on SCK to shift the data out on pin Q_H. SCK triggers on a rising edge. Drive it high, then low.
7. Repeat last 2 steps for as many inputs as you are interested in.

This is only a rough answer because there are areas I'm not sure of, so I'd appreciate it if anyone could point out mistakes. I assume one of your issues is that the delay function only allows for a resolution of milliseconds and the delayMicroseconds function only has a minimum delay time of 2μs. However, the ATmega32U4 on the Arduino Micro (and others as well) has a clock speed of 16MHz, we can therefore calculate the time between cycles:

$$\Delta t = \frac{1}{16\text{ MHz}}=0.0625\: \mu\text{s}$$

Therefore, we can calculate how many clock cycles need to elapse before changing the output from HIGH to LOW and back again. We want a delay of 1μs and therefore we calculate:

$$n=\frac{1}{0.0625}=16$$

Where n is the number of clock cycles. We therefore want the CPU to wait for 16 cycles, we can achieve this with some inline assembly:

__asm__("nop\n\t"/*14 more of these*/"nop\n\t");

However, I haven't taken into account the number of clock cycles digitalWrite requires before changing the output pin voltage, so you would need to look into that too.

As I said, this is just a sketch answer, so I'd appreciate validity checks and suggestions/criticisms; I'm quite new to this!