I’m looking at the CSD17303Q5 power mosfet which boasts a 100A max drain current. It confuses me why they have it in a VSON surface mount package because most pcbs would not be able to handle that kind of current by a long shot. The width of the drain and source pads are ~3mm and ~5mm. In order to carry the solicited 100A across a 3mm wide trace, you would need a 30oz cu pcb, which is absurdly big. What am I missing here?
Electronic – Why would this power mosfet be made in a surface mount package
ampacitypcb-designsurface-mount
Best Answer
In this case you want the track wider than or equal to length w/l>=1.
This also reduces inductance to <= 0.5nH/mm
e.g. pin 1 to 3 = 0.4x0.4mm to 2.6mm wide track minimum
With 2 oz finished tracks, each would add 0.00027 Ohms to the wider track to reach connector or load.
The Source on pins 1,2,3 might be expected to go to ground plane microvias.
Furthermore, you won't expect to find these high current ultra low RdsOn packages with thruhole packages due to the associated high effective series inductance and ringing that would result with longer lead lengths.
This is because the output Coss always increases with lower RdsOn and with risetimes <<1 us range results in degraded performance. It is also due to the the fact that inductance does not change with size, only geometric ratios.