Electronic – wrong with this simple SMPS

switch-mode-power-supply

I've been reading up on power electronics lately and as a challenge (and also a learning exercise), designed my first switching power supply – a buck converter in this case.

My current design

It is intended to supply 3.5-4.0V (decided by diode reference source) and up to 3A in order to drive some power LEDs with any DC source, ranging from a 5V USB charger up to a 9V PP3 battery. I want an efficient supply, as heating and battery life will be a real issue (otherwise I'd be lazy and use a 7805+diode).

NOTE: I already noticed that I've got the switching logic the wrong way round, I need to either swap the connections into the comparator or use !Q to drive the MOSFETs.

My choice of MOSFETs instead of BJTs was due to the power losses in a BJT, and the thermal issues arising. Is this decision to use MOSFETs over BJTs/IGBTs due to improved efficiency the right call?

Rather than using a PWM chip as many hobbyist forums suggest, I decided to use a comparator/clock/latch combination to rapidly switch between "charging" and "discharging". Is there any particular disadvantage of this approach?
The CMOS latch (a D-flip flop) copies data to the outputs on the rising edge of pulses from the clock generator (a CMOS Schmitt inverter + feedback).

The choice of time constants / corner frequencies for the clock and the buck lowpass (10-100kHz and 10Hz respectively) is intended to support the small ripple approximation while also allowing the output capacitor to charge in a reasonable amount of time from power-on. Is this the right set of considerations for deciding the values of these components?

Additionally, how would I go about calculating the value of the inductor? I would assume that it depends upon the typical output current and the lowpass capacitor's value, but I can't quite figure out how.

[edit:]

In the past, I've used the shown MOSFET pair (in addition to software PWM) to create H-bridges for bi-directional, variable speed motor control – and as long as I kept the PWM period much larger than the MOSFET switching time, the power waste from shorting during switching was negligible. In this case though, I'm going to replace the N-mosfet with a Schottky diode since I've never used a Schottky diode before and want to see how they behave.

I use a simple inverter+RC combo to provide the clock signal as I don't need a particularly consistent or precise frequency as long as it is considerably higher than the high-cut corner frequency of the buck-boost.

[edit II:]

  • I built it on a breadboard and to my surprise, it worked straight away without any issues, and at ~92% efficiency (compared to the 94% that I'd calculated from switching/component losses).

  • Note that I omitted the resistor in the output stage, out of laziness – also I can't quite recall why I put it there in the first place.

  • I omitted the reverse diode parallel to the P-MOSFET, and also used a 1N5817 Schottky diode (note: 1A rating) in place of the N-MOSFET. It doesn't heat enough for my fingertips to notice. I've ordered a higher-rated diode though for when I assemble the final unit, which will run with full load.

  • I accidentally blew the LM393 comparator during testing, but an LM358AN took its place straight away without any issues.

  • As I can't find any decent circuit design+layout/routing software that will run on Arch Linux x64 (or even install, in the case of native Linux software), I've manually layed it out so it probably won't work by the time it's soldered… But that just adds to the "fun" I guess!

  • Component values used: Clock gen { 1kR, 100nF }; Buck output { 330uH, 47uF }; Input capacitor [not shown] { 47uF }; P-MOSFET { STP80PF55 }; N-MOSFET { Schottky diode instead, 1N5817 – to be replaced with >=3A version }; ICs { 40106 NXP, 4013 NXP, LM358AN }

Best Answer

Yes, there are stability issues and a brief moment when both FETs are on but the beauty of using a FET on the pull-down part of the circuit (i.e. a synchronous buck converter) instead of a schottky diode is this: -

  1. Whatever duty cycle your PWM is the output voltage stays constant as a fraction of input voltage - you are in effect using the L and C on the output as a low pass filter to a square wave input.
  2. Whatever load you have connected, providing the FETs are lowish on resistance, within reason you don't need to change the PWM mark-space ratio.
  3. It will be more efficient on heavier loads than a non-synchronous buck regulator but the down-side is that on light loads it will be less efficient because you need current to drive the N channel FET because of gate capacitance.

I'd also advocate building a 555 timer sawtooth generator as the basis of your system. Something like this: -

enter image description here

I'd then feed it into a fast comparator and then the use the comparator output to drive the two FETs. The two FETs can be "time segregated" with a small RC time delay on the output of the comparator - the undelayed output and the delayed output would feed an AND gate for one of the gate drives and the the same for the other gate drive but using a NOR gate. Plan on maybe 50ns time delay introduced.

What you get is a half-decent synchronous buck convertor that just needs an input to the other comparator input to get the required duty cycle changes. OK so far? Then you can apply a simple control loop that lowers the 2nd input to the comparator as the input voltage gets bigger. Get this working and then apply another small control loop that actually regulates the PWM with load current changes a tad and this would probably work and no negative feedback involved.

Then, as the final touch, and with care and subtlety apply an overall control loop to keep the output better stabilized but remember, with a sync buck you can pretty much get half-decent stable performance without control loops that use negative feedback - if you are wanting to go this approach I can recommend it.

However, for me, I'd just call on Linear Technology and get the device that already does the job.