Electronic – Xilinx ISE Prevent Trimming For CPU

I am creating a custom CPU and would like it to be programmable on the fly instead of hard coded in VHDL. The issue I am having is that without initial code for the CPU to run, ISE will trim large amounts of my logic away. I have tried using the 'S' attribute to declare my signals and variables as 'not trimmable', but that does not work on all of the signals. I have also tried setting the keep hierarchy option in XST, but even that fails sometimes (complains that there is a conflict with the KEEP settings and will trim anyway). Is there a way for me to tell ISE to not trim anything at all without having to create a default program that runs through every opcode?

Here is one of the errors I am seeing:

WARNING:Xst:638 - in unit cpu_instructor_copy Conflict on KEEP property on signal brain.current_opcode<0> and brain.stack_pointer<14> brain.stack_pointer<14> signal will be lost.

Without the S attribute, the stack_pointer will just get removed.

I have the following at the top of my 'brain' process

variable stack_pointer : integer range 0 to (2**mem_addr'length) - 1 := stack_origin;
attribute S : string;
attribute S of stack_pointer : variable is "YES";

Thank you in advance!

Edit: Here is the actual code (no attributes in it currently as those are on my personal test copy)

Edit 2: The problem was fixable by changing my program from a constant to a signal, adding a new process that could 'program' the CPU with serial (at least that's what the design thinks), and setting the Map process to not trim unconnected signals. I will post the code a little later. Thank you all!!