Flash IC memory mapping for two application

On the NAND flash chips I've seen, a page is the amount of information that is typically written at a time, and a block is the smallest amount that can be erased. Some chips have sectors which consist of multiple blocks, and provide commands to erase an entire sector at once. I've never found such commands very useful, though, since they seem to take almost as long as erasing blocks individually.

I would suggest using terms "programmable page" and "erasable block" to refer to those two different sizes of entity. The term "sector" would not generally be used in vendor-independent discussion, since different vendors define sectors differently. While programmable pages are usually of one uniform size, and erasable blocks are usually of another, many manufacturers use a mixture of large and small sectors, even within the same device.

To amplify stevenvh's answer, any type of logic, when given an input signal, will take some time to produce an output signal; memory is often very slow compared with other logic. Often, there will be a guarantee that the output signal will become valid within a certain amount of time, but that's it. In particular, it's possible that the signal might change several times within that interval, and there will be no indication, prior to the end of that interval, that the signal has achieved its final "correct" value.

When a typical microcontroller or microprocessor reads a byte (or word, or whatever unit) of memory, it generates an address and, some time later, looks at the value output by the memory and acts upon it. Between the time the controller generates the address and the time it looks at the value from memory, it doesn't care when or whether the output signals from the memory change. On the other hand, if the signal from memory hasn't stabilized to its final value by the time the controller looks at it, the controller will misread the memory as having held whatever value was being output at the moment it looked. Normally the controller would look at the value from memory as soon as it was ready to do something with it, but if the memory's value wouldn't be ready then, that might not work. Consequently, many controllers have an option to wait a bit longer after they're ready to process data from memory, to ensure that the output from memory is actually valid. Note that adding such delay will slow things down (the controller would have been happy to act on the data from memory sooner), but will not affect correctness of operation (unless things are slowed down so much that other timing obligations cannot be met).