Latch power on-off circuit

latchlow-powermosfet

See the circuit below:
Circuit Diagram

I am trying to make a shutdown circuit for a low power application. Basically, I want the system to be able to be turned on by a button push, and then turned off by a microcontroller. But I also want to be able to read the button state while the circuit is on.

In the circuit shown, when the circuit is off, the "E" input is high. This means that Q=D, which defaults to low when the button is not pressed. When the button is pressed, D (and consequently Q) go high, turning on the FET and enabling the circuit. This also brings "E" low, preserving this state.

Then, when it's time to turn off the circuit, the microcontroller pulls "E" low and turns everything off. It's important to note that the pin that "E" is connected to is normally a high impedance input.

My question is to what the state of "E" will be in the off state. This circuit is based on the assumption that "E" is high when the FET is off. However, I'm not 100% sure this is the case. My next step is to build this circuit, but I wanted to see if anyone could find something wrong before I buy the parts and try it out.

Thanks!

Part numbers:

D-latch: SN74LVC1G373DCKR

MOSFET: NTMFS4927NT1G

Battery: 18650 Li-ion battery

Best Answer

As you currently have it, it's very likely that E in the off state is high, but that depends on what "LOAD" is. If LOAD somehow disconnects or is extremely high impedance, then you have no idea where E is.

Instead, I would tie a very large ~1Mohm resistor across the load to ensure that current can get around the load even in the "off" state. This will ensure that E is set to high even in the off state. It won't consume any current in this state because there's no direct path to ground until MCU Power Off is pulled.