Multicycle datapath vs single cycle datapath

computer-architecturecomputerscpu

I have a fairly simple question but have not been able to find a good answer googling.

I understand how pipelining works by having 1 cycle per step, each instruction takes 5 cycles and they start on the second step of the previous instruction to finish the whole load faster.

Now from what I have read multicycle also has multiple steps per instruction but each instruction starts after the previous instruction has finished. With the benefit being for instructions that arent 5 steps long they do not have to go the whole 5 steps. Im assuming that we have to use the time of the slowest step for the clock cycle to allow all steps to works.

Now if this is correct I have calculated a small program that i was give as a homework problem where single cycle datapath is faster than the multicycle datapath. Is this normal ? or is there something about multicycle datapath that I have wrong ?

Best Answer

For a single cycle implementation it is to be expected that the clock frequency (determined by the longest delay through all access times and the logic) will be lower than for a multi-cycle implementation (where, presumambly, in each cycle only a part of the total data path of the single-cycle approach will be used).

If this does not hold for your implementation the interesting point is why.