Need for edge triggered versions other than master slave

digital-logicflipflop

I am studying synchronous digital circuits and I have come to the conclusion that master slave flip flops are edge triggered? Is my study correct? If master slave versions ARE edge triggered, why do we need separate edge triggered flip flop versions like the edge triggered D flip flop (the non- master slave configuration)?

Best Answer

Master-slave just a way of combining two gated or level triggered latches together to form an edge-triggered flip flop. A master-slave D flip flop is just one way that you can build a D flip flop.

The idea behind a master-slave flip flop is that you can connect two latches back to back so the 'master' latch will update while the clock is low and the slave latch will update while the clock is high. In this instance, when the clock transitions from low to high, the current state at the input of the master flip-flop is captured and propagated to the output. This functionality forms a D flip-flop.

However, master-slave is not really the only way to build a D flip-flop. It is possible to build both dynamic gates that use capacitance to hold the value during the clock transition, allowing the gate to be much smaller and simpler. It is also possible to build the same functionality with some inverters and transmission gates. It depends on what level of the design you are working at. If all you haveis logic gates, you probably need to build a master-slave flip-flop. However, if you are working at the transistor level, then you can build something more optimized.

tl;dr: a master-slave flip flop IS a D type flip-flop, but it is ot the only way to make one.