I am using a DAC form analogous devices viz – AD565A. Now, according to Nyquist theorem the minimal sampling rate for a decent reconstruction of a signal twice the rate of its highest frequency component. Now, the Max sampling rate of different DACs are given in rates ranging from ksps to Gsps. I an not seeing any such sampling rate info on this data sheet. Also, DACs are given a clock input. The sampling rate (Max) is a factor of this clock. Henceforth, if the DAC is given a clock of 10MHz, the max sampling rate (decent) is 10Msps, right ?
Sampling rate in dacs
analogdacsampling
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Best Answer
Going back to a 1994 databook I have data for the AD565A.
There is no sampling rate specified for this part because it has no clock inputs.
It is a raw DAC with no digital support logic whatsoever. Each digital input directly connects to a switch between Vref and Ground. You can change the input pins at any rate you like!
What IS specified for it is settling time :
The latter is the more useful specification. It imposes a useful upper speed limit of 4 MHz sampling rate. But note, to be useful at this speed, you will need an external sample and hold, otherwise you'll see a lot of switching artefacts on your output while the output settles to the new value.
And you need to add the sample time of the S+H to the DAC's own settling time, and this further reduces the useful sampling rate, e.g. with 50ns sample time + 250ns settling time, minimum period is 300ns or sampling rate is 3.3 MHz. (A further note : designing a fast accurate S+H is quite an exercise in itself.)