Understanding Digital Multiplexing

multiplexer

As I understand it, digital multiplexers contain multiple inputs (2^N), one output, and N selector lines. The selector lines are used to select which input is mapped to the output line. I then understand that a demuxer takes a single input line and based on the selector lines maps the input to one of multiple outputs.
So, assuming the above is correct, my question is how does using a mux/demuxer pair to change 16 line parallel communication signal to 1 mux'ed signal, then back to a 16 parallel signal work? How would the demuxer know the selector signals to use to change the mux'ed signal back? Do you need to run the mux'ed signal line with the selector signal lines together so that the demuxer knows the proper mapping?

Best Answer

There are three scenarios that I see:

  1. The selector lines would either to run with the data line (as you suggested)
  2. The selection comes from an external entity that feeds into both, the MUX and DMUX
  3. The selection lines are controlled by a synchronised entity e.g. a clock or a counter powered by a clock.