It's called negative feedback and the biasing attempts to keep the gate at "just the right amount of voltage" - should the drain voltage droop a bit low, the DC voltage applied to the gate reduces and, this in turn, turns the fet off slightly and, in turn, this makes the drain voltage rise a bit. Thus there is a measure of stability! It's proper negative feedback.
R6 (the pot) in the source connection is only 100 ohm max and this will alter things a little bit but it's not a showstopper at one end of its travel or at the other. Overall, AC gain will be a tad limited when R6 is at 100 ohms but it won't affect things too much.
So, in short, feeding the gate half the supply doesn't necessarily keep the FET biased as well as the "negative feedback" method AND, a source resistor of 0 to 100 ohms isn't going to change things that much. Think about how much voltage the gate needs (with respect to source) to adequately "turn on" the FET - if it is (say) 2V then the drain has to be at 4V (due to R3 and R4) - if it needs 3V then the drain has to be at 6V. Because we can't be as sure about a FET (compared to a BJT) this is a sensible way of biasing it. Having said that I've seen plenty of BJT circuits that use EXACTLY the same method for biasing the base i.e. collector feedback.
On a slightly off-question point - opamps work precisely this way.
1) OA2's +ve input is just a high input impedance as OA1's, so the extra amp gains you nothing.
2) 100k is good for typical circuits, many people also use 10k.
3) The effect of C1 would only be noticeable in very high quality applications, or if you had very long leads on R1 and R2. It doesn't hurt to put it in though.
Don't use C2. A direct connection of a capacitor to ground at the output makes most opamps go unstable. Again, the effect of a properly connected C2 would only be noticeable in the highest quality work. Put a resistor, 100ohm to 1k, between the opamp output and the capacitor to ensure stability.
4) You could use a pot, but why? If you want an adjustable offset in service, then fair enough. However you do not have DC coupled output gain, so that doesn't seem to be the case.
It should not short rails when turned all the way if connected correctly. That is, one end of track to gnd, the other end of track to +ve supply, the wiper as output to a high impedance load.
5) C3 together with the impedance it's feeding (in this case R3) should have a time constant >> the period of the lowest frequency signal. So C3 > 1/(f.R3) (purists please note I've rolled the 2pi into the difference between > and >>)
If you were doing this sum with R1R2 providing the offset directly without OA1 buffering, then instead of R3, you would use the parallel combination of R1 and R2.
6) Your input signal should be from a lower impedance than R3. In this case, the sound card output is nominally zero, and in practice a few ohms. A rule of thumb in audio like this is that 10k input impedance is plenty high enough to be driven by any audio source.
7) As before, it's audio, and opamps, anything in the 10k to 100k range will work OK.
8) Yes you can, but we generally don't do it like that, for too many reasons that I won't go into now.
The standard way to achieve variable output is to use a fixed gain stage, preceded by a potentiometer. This does have higher noise at low output than the way you suggest, but that's acceptable in most applications. Because you are posting here, I assume you aren't attempting world-beating performance.
9) The C4.R5 time constant gives you the frequency for which the gain is 3dB higher than the DC gain, often called the corner, or break frequency. f3dB = 1/(2.pi.R.C)
10) I'd be cautious about the 5v USB supply. Do filter it with an RC (small R, big C), or at least suspect that rail first if there's noise.
TL;DR - Drop OA1. Replace R3 with R1 and R2. Use 'signal in' to feed the top of a 10k log pot, its bottom to ground, and its wiper to C3.
Best Answer
Here's the picture: -
Output voltage is \$I_C R_L\$ and, if \$R_L\$ halves then voltage gain halves. I believe you are mistakingly thinking that the collector generates a voltage. It doesn't. A BJT is commonly defined as having current gain i.e. Ic/Ib (or hFE). Input current is proportional to input voltage in the circuit above so now you have the transistor with an output current for a given input voltage.
The output current is converted to a voltage by \$R_L\$ and of course, the lower the value of RL, the lower the output voltage for a given input signal.