I'm working on a DDR memory circuit, and I'm not sure how big an issue crosstalk is on the command/address bus. I've designed for crosstalk with the DQ/DQS and CLK lines because they are high speed/bidirectional, but my command/address bus has ended up with very small spacing between traces.
With the short trace length I'm not expecting forward crosstalk to be big.
So my question is – does backwards crosstalk matter if it is only occurring at the driver end of the transmission line?
Best Answer
If your termination in the driver end matches the transmission line impedance, the backward crosstalk (NEXT) will not reflect off there and reach the receiver (the memory). This works only if your routing is not too complex - often routing with length matching will have traces run side by side in both directions (so near-end becomes far-end in some stretches).
Forward crosstalk (FEXT) is usually much less than backward crosstalk, as you observe. For NEXT both the capacitive and the inductive coupling have same polarity. For FEXT they have opposite polarity and in a perfect stripline they actually cancel to zero.
Don't be fooled by the coupled length. For NEXT you will easily reach max crosstalk with only a fairly short parallel run (depends on the rise/fall-time of the signal, which in your case may be 150ps-250ps).
Be very careful with broadside coupled traces - the capacitive coupling is much more than the side-by-side coupling in a typical stack-up.
Notice that crosstalk can be reduced by coupling the traces closer to the reference plane. Something like 4 mil traces and 4 mil dielectric thickness (verify the impedance) is a good starting point.
I strongly recommend you use an IBIS simulator to simulate this before committing to layout.
Notice your trace impedance on an inner layer may have a +/-10% tolerance on impedance in actual production. Outer layers may be 2x that.