4 mosfets inverter circuit low output voltage problem

h-bridgeinverterpower electronicsswitchingvoltage

I have used the mosfets as a switch to generate a simple square wave at the output. Taking the concept from the simple switches if there were switches instead of the mosfets as shown below then we must have a voltage of amplitude equal to +Vin and -Vin across the resistor. Moving this forward when I used mosfets then instead of getting +Vin/-Vin I am getting a lower voltage at the output shown below. I dont know why isnt the mosfet switching properly. Kindly help me solve the problem.
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The switching concept taken from the site is shown above.
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With an input of 20V I am getting +1.26/-1.26 instead of +20/-20.

Best Answer

A lot of the "explanations" of the function of bipolar junction transistors and mosfets imply that they are "switches". They are not really switches unless you use them in a circuit that makes them act like switches.

It's a fair assumption that power mosfets with VDS ratings above say 25-50V require 10V gate-source voltage to fully turn on.

You are using all N-MOS devices. To turn them on, assume that the gate has to be 10V higher than the source. You'll need a voltage multiplier to get those higher voltages needed on the high-side switches. Such circuits are sometimes called bootstrap gate voltage or boost gate voltage generators. The switching action of the mosfet "walks" the boost capacitor up to a voltage higher than the supply voltage.

A high-side booststrapped gate driver might looks something like the following:

schematic

simulate this circuit – Schematic created using CircuitLab

M7 is an inverter and generates the gate waveform for M5-M6 inverter. Let's assume that the total parasitic capacitance from A to GND is about 60pF - that includes gate capacitances of M5 and M6. Point A's response has a time constant of 10kΩx 60pF=0.6μs. The gain of M5/M6 speeds up the effective transition time seen between R3 and R4. The time constant at B is about 60ns. Gain of M3/M4 again speeds things up, and the gate of S1 sees a time constant of 100Ωx1nF=0.1μs. That's a reasonable slew rate for your application I think.

R1,R2 and R3,R4 not only control the dV/dt on the subsequent gate, but also limit the shoot-through current when M3 and M4 or M6 and M5 are both conducting during the state transition between logic 1 and logic 0 (and vice versa).

The bootstrap works as follows:

  • When OUT is at 0V, C1 charges to about 30V via D1.

  • As soon as OUT starts slewing high, the capacitor C1 "rides along" on top of that voltage, diode D1 turns off, and the BOOST voltage is OUT+20V (approximately). In practice, C1 will discharge somewhat, but as long as the BOOST voltage is 10V above OUT, M1's gate-source voltage will be high enough to let M1 act as a switch, as desired.

M3..M7 are "small signal" devices, but they need to withstand up to 2xsupply voltage, or 40V in the circuit shown.

You need such a high-side driver for both S1 and S2 in the first diagram in the question.

You can also use a dedicated high-side driver IC, of course. The driver IC will implement a circuit that fulfills the same function, just implemented using sub-circuits that make sense on a silicon die. The circuit I've drawn is how it might be done using discrete mosfets on a PCB/breadboard.

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