I want to build a circuit with logic gates and flip-flops, in each clock which will turn 6 LEDs in
the following sequence: 1 – 6, 2 – 5, 3 – 4, 4 – 5, 4 – 6, 5 – 6, (repeat). I have spent 2 days in order to get perfect design. Does anybody can help me for making the perfect structure.
Circuit controlling 6 leds
digital-logicled
Related Solutions
Serial/parallel-load shift registers and bit rotations are going to work most naturally with a D flip flop, since they just send data straight through; binary counters are going to work most naturally with a T flip flop, since each counter bit Ck = Ck,previous XOR carryk, where carry is the carry bit from the previous stage.
If you look at JK flip-flops, however, they are the "universal" flip-flop that can act as a D- or T- flip-flop depending on the input signals.
To get a D from a T, or vice versa, you need an XOR gate. To get a T from a JK, you just tie the JK inputs together. To get a D from a JK, you need an inverter, as the J/K inputs need to be opposites.
In your application, you've got enough complexity, that I suspect the gate counts are going to be very close, and it's probably not worth worrying about -- unless you have to optimize, in which case you'll just have to try it for each case.
IMHO, the D flip-flop is conceptually the simplest to use, and it works naturally with most of your operations, so I'd start with that.
Generally, you want to show the external inputs at the top (like your diagram does), and outputs along the bottom, and then show how a change in one of the inputs affects the system.
However (IMO) the timing diagram shown in your example is missing some important information: which input signals directly affect the outputs of various gates. I have added the additional information here in red:
so now it is clear that when ¬S goes low, this forces Q to go high after a propagation delay tp2. Q high along with ¬R high makes ¬Q go low after propagation delay tp1. This is now a steady state and no further changes take place as a result of ¬S going low.
You can get a little more elaborate, such as showing on the diagram that both ¬R high and Q high ANDed together cause ¬Q to go low. This makes it more clear that just one signal ¬S low causes Q to go high, but two signals ANDed together (¬R high and Q high) to make ¬Q low.
To draw diagrams like this, you just change an input, and then follow it through all circuit to see how it changes the state of various elements.
In your example. assuming the D flip-flops are positive-edge triggered (like the 74HC74), and all of the flip-flops are initially reset (Q low, ¬Q high) then a rising edge clock pulse on vstup will set the first flip-flop high. A second clock pulse on vstup will set the first flip-flop low and the second one high etc.
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Best Answer
There is a simple process you can follow for your design:
1. Identify the number of states
From what you have said it appears you have 6 states - 6 different outputs in your sequence before it repeats. So build a counter which counts up from 0 to 5 then resets as it reaches 6. This will be your input.
There are different counters you can make - a 3bit binary counter can go from 0-7 so you would just need reset on 6 logic. You could make a counter which is just 6 registers in a cycle where only one is ever high - the 1 then cycles round (one-hot). And so on.
2. Work out your outputs
In you case you have 6 LEDs. These are your outputs. So you need to draw a Truth Table for each output which relates the output to each of your inputs (see 1.).
3. Determine the Logic
Next once you have your truth tables, you need to determine the logic needed to make that mapping. The easiest way to do this is to build a Karnaugh Map for each LED. Use the map to determine the logic that maps the input counter to the LED value for each of the states.
4. Simplification
It may then be possible to reduce the logic by simplifying the result from the Karnaugh Maps. This can be done by looking at the Boolean expressions and applying various rules of Boolean algebra.