If you want to blow up that transistor in a hurry, yes that's a great design. Vdd at the drain of a CS amp will allow huge amounts of current to go straight into your CS amp. If this is an NMOS, once you turn on the transistor by raising the voltage to a given level, the resistance of the source/drain path is virtually 0. Let's say it's actually 0.1 ohms and your Vdd=1V. This would allow 10amps of current through your transistor. You'll let the magic smoke out.
The other issue with putting Vdd at the drain is that you now have no method to use the output of the amplifier. All of the current comes from Vdd and drops straight into ground. There's no longer a place to tap in and measure voltage or current.
The reason why a current source is used is to prevent exactly what I describe above. A current source limits the amount of current that can be sent into the CS amp. An ideal current source also has an output resistance of infinite so you'll maximize the gain of a CS amp. Having this other component as part of the CS amplifier allows the voltage to swing freely between Vdd and Gnd without being pinned to either.
Early effect on the output current is helped by emitter degeneration- it's negative feedback so it increases the output resistance. I have used this to produce some precise current ramps that would not be possible using an ordinary op-amp (too fast for the op-amp to respond).
If there is a tiny difference, a fraction of a degree C, between the junctions of Q3 and Q4 you will see a large difference in the collector currents. The Vbe will not be perfectly matched to begin with either. This is much less of a problem when the transistors are part of a monolithic circuit (inherently matched) and are side-by side (or perhaps consist of multiple transistors interleaved physically and electrically in parallel pairs). Still there will usually be some difference in power dissipation between the two transistors so that will cause a gradient and some Vbe change.
For example, if the collector current is 1mA, the transconductance of the transistors will be about 0.04 mho at room temperature, so 2.5mV difference in Vbe (about 1°C) would cause about a 10% error in the collector current. Beta has a relatively small effect (assuming the transistors have a beta in the hundreds).
The Early effect will cause a reduction in the output resistance. Since the Early voltage is normally ~100V (see SPICE models for the relevant parts) the output resistance will be about 100K\$\Omega\$ in this case, so pretty good. With the emitter resistors as shown it will be several M\$\Omega\$.
Early effect can be combated by using the 4-transistor improved Wilson current mirror configuration. With discrete parts and for low frequencies, it's easier to just throw an op-amp at it.
Check out the hybrid-pi model for more insight, and try some sims with a small base voltage added to one of the transistors.
Best Answer
It's certainly possible to do this. In fact, it is done quite often in old test equipment. However, it can be difficult to get this to work right as the transistor gains have to be very precisely matched. This is easy to do on a chip as the transistors are physically close to each other and as a result will be built with similar characteristics as well as being thermally connected, but with discrete transistors this is much more difficult. For one, you will need to make sure that the transistors are at the same temperature by physically connecting the cases together. Second, you may need to get a box of transistors and swap them out until you find some with similar current gains.