transistors
I always wanted to have some ~100 MHz frequency divider at hand, and since I have some BC548's lying around I ran a quick Simulation with Pspice Student 9.1.
Source: electronics-tutorials.ws/waveforms/bistable.html
A 20 MHz square wave input yields this:
A quick look at the BC548 datasheet says it has a transit frequency of ~100 MHz,
so I'd say it can be done but I don't know why the simulation fails at higher frequencies.
Some analog Gurus know why ?
best,
Chris
If I had to make a decision, I would say it looks closest to a D-latch. The problem is that a SRAM cell is not really analogous to a particular type of static CMOS storage because of the way it operates.
There's a few differences that make SRAM quite different:
While there are similarities, SRAM and DRAM don't share a close relationship between any of the stand-alone single-bit storage cells.
What you are trying to create is a thyristor and it is slightly different.
simulate this circuit – Schematic created using CircuitLab
To sustain a transistor on you need current through the gate, in this design the two transistors are feeding output through each other.
Best Answer
It's not really a simulation issue I think, more of a circuit design issue.
You'll need to avoid saturation to get close to 100MHz. Try Schottky clamps on the transistors (eg. A BAT54 dual). The clamp diode is connected from collector to base to prevent saturation.
Also, you can study how ECL flip-flops work. ECL circuits are more like differential amplifiers and do not have switching transistors that saturate.
Of course you can simply buy a flip-flop that us guaranteed to work beyond 100MHz such as a NC7SZ74, which will toggle at 250MHz.