Double tap push button which resets if not pressed twice in quick succession

buttondelaypower

I'm new to electronics, so don't know where to begin –

I'm trying to create a push button which needs to be pressed twice in quick succession, to actually power on a device. Pressing it just once, or having a long gap between presses should be equivalent to not pressing the button at all.

Is there a way to do this ? How would I get started ?

Best Answer

There are many ways to do this. In most modern cases, this function would be a few lines of code in a microcontroller that is already present and is (for example) woken up by any closing of the switch.

A simple way to do it without a microcontroller is with a CD40106B hex Schmidt trigger gate and a CD4013B dual-D flip-flop that are both powered on continuously. You'll also need three RC circuits (so about 7 resistors and three capacitors). The time constants are:

  1. Debounce the switch. Needs a pullup resistor, discharge resistor, series resistor to ST input (1K-10K is okay for this purpose) and a cap to ground (1uF ceramic is okay for all these). Should be maybe 20-50msec, so 20-50K.

  2. Time the space between presses. Needs a series resistor to output, series resistor to input and a cap to ground. Time is up to you, probably < 2 seconds, so 500K-2M.

  3. Time power-on reset. Needs a series resistor to Vdd, series resistor to input and cap to ground. Time should be something like 100msec, so ~100K.

Clock both FFs from the debounced pushbutton (rising edge, so you need two ST inverters). D input of the first FF is tied to Vdd, so output goes high on the pushbutton press. Feed the Q output through delay (2) and through two ST inverters to self-reset and to the D input on the second FF. Delay (3) goes to the reset input on the second FF so that power is off when first applied (there is a brief instant after power is applied where a single press of the switch may turn the power on depending on the state of FF 1. Another gate would get rid of that, or connect the cap to Vdd rather than ground.

Something like this fairly straightforward circuit: (the ST "Not 5" is unnecessary, it's there because the FF symbol does not show the /Q output). The unmarked inputs are Reset. Set inputs must be grounded.

schematic

simulate this circuit – Schematic created using CircuitLab

R8 deliberately slows the turn-on of Q1 so the battery (generously bypassed by C4/C5) won't glitch if there are caps in the controlled circuit.

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