DSP – practical even or odd functions

If I was asked to look at DSP products, I would look at the architecture. The hardware architectures for DSP processors are more varied than for general purpose processors.

1. Word Length. As you mentioned, your source data is 24-bits. So, unless you are able to lose some fidelity, you will need a DSP that can handle 24-bits data at least.
2. Fixed/Floating Point. You will need to look at your algorithms to see if floating-point hardware is needed or if it can be entirely implemented in fixed-point. Not all DSPs can do floating-point in hardware.
3. Addressing Modes. You are dealing with buffers all the time. While DSPs have circular addressing modes, some have more advanced modes that are able to chain memory blocks together or flip memory blocks in hardware and more. I would say that this is the most critical architecture aspect for a DSP.
4. Special Instructions. Every DSP has specialised instructions. At the minimum, they will have a MAC instruction. However, some have far more esoteric ones which may benefit your application.
5. Data Paths. Some DSPs have unique data paths, or even multiple datapaths, which allow different data streams to be manipulated separately or combined together, in hardware.
6. Execution Units. Most DSPs have many parallel execution units that can perform different things at the same time - e.g. multiply, add and shift different registers at the same time.

Then, looking at the algorithms that need to be coded, I would select a DSP architecture that is easier to use to implement the algorithms.

The features that (used to?) distinguish a DSP from a more general-purpose CPU more-or-less centre around effective execution of a tight loop of MAC (multiply-acumulate) instructions, iterating over two arrays. This implies

• a MAC instruction (with saturating behaviour)
• access to two operands per MAC instruction (often realised by two memories)
• low inner-loop overhead (for instance hardware counter/begin/end registers)
• fast adjusting of the (two) data pointers
• when a cache is present: fine tuned control over the cache behaviour, including prefectching of data

In your situation I would dig up a few typical DSP algorithms (convolution, filters, FFT), find the inner loop, dream up the instructions required to do that loop as fast as possible, implement those instructions, and then add other instructions to make it look like a real CPU. For extra bonus points: minimize transistor count in order to minimize battery drain.