Dspic Timer1 Interrupts Occuring Twice as Slow

pictimer

Maybe I'm missing something here but on a dsPIC33FJ16GS502, I designed Timer1 to toggle a pin at 200 Hz but when implemented, the frequency is actually 100 Hz. I have the following configurations:

XT (HS): 16 MHz
FCY: 8 MHz
Prescaler: 64
PR1: 8 MHz / (200 Hz * 64) = 625

Here's the code:

_FOSC( POSCMD_HS & OSCIOFNC_OFF );
_FOSCSEL( FNOSC_PRI & IESO_OFF );
_FWDT( FWDTEN_OFF );

int main(int argc, char** argv) {


    OSCCONbits.COSC = 0b010;    //  HSXT no PLL
    OSCCONbits.CLKLOCK = 1;
    OSCCONbits.IOLOCK = 1;

    CLKDIVbits.ROI = 0;
    CLKDIVbits.DOZEN = 0;

    //  Set TMR1 Registers
    T1CONbits.TON = 0;              //  Shut off timer for configuration
    T1CONbits.TSIDL = 1;
    T1CONbits.TGATE = 0;
    T1CONbits.TCKPS = 0b10;         //  1:64 Prescaler
    T1CONbits.TCS = 0;              //  Use internal clock
    TMR1= 0x0000;
    PR1 = 625;
    IPC0bits.T1IP = 0x01;
    IFS0bits.T1IF = 0;
    IEC0bits.T1IE = 1;

    T1CONbits.TON = 1;              //  Turn on Timer

    TRISBbits.TRISB8 = 0;
    LATBbits.LATB8 = 1;

    while(1);
}

void __attribute__((__interrupt__, no_auto_psv)) _T1Interrupt(void){

    LATBbits.LATB8 = ~LATBbits.LATB8;
    IFS0bits.T1IF = 0;

}

If PR1 was set to 312, then I would get the 200 Hz frequency but according to my calculations, PR1 set to 312 would result in a frequency of 400 Hz. I have no idea why I'm out by a factor of 2. I'm pretty sure I'm configuring the registers right.

Best Answer

Your code is right, you are actually toggling the pin at 200Hz... That means its frequency is 100Hz.

The period you are setting in the timer is the distance between a rising edge and a falling edge, and vice versa, so the wave period will be twice the timer period because the wave period is defined as the distance between two rising (or falling) edges.

Go with the value that works and you will be fine.

Related Solutions

Electronic – dsPIC33, SPI slave, and Timer1 interrupts. What happens

Normally you would set up the SPI peripheral once, then leave it on. The extra handshaking you are doing is preventing you from using the hardware to its full capability. Also doing a busy wait for the master to assert slave select is a bad idea if you ever want the processor to do something else.

Since you are transferring 16 bits of less per message, I would just let the hardware take care of it. Then you can monitor the SPI interrupt flag to determine when new data has been received from the master. If you need to slow down the master for flow control reasons, I would do that outside of the SPI message. I suspect the interrupt is adding latency to your home grown handshaking scheme, and something somewhere isn't quite right and can't tolerate that latency. That's assuming of course that the interrupt doesn't try to touch the SPI hardware or any of its I/O lines.

Electronic – Can’t run PIC24EP128MC206 at rated speed

You should check out example 7-2 in the pic24E family reference manual (FRM) titled "Code Example for Using PLL with 7.37 MHz Internal FRC":

// Select Internal FRC at POR
_FOSCSEL(FNOSC_FRC & IESO_OFF);
// Enable Clock Switching and Configure Primary Oscillator in XT mode
_FOSC(FCKSM_CSECMD & OSCIOFNC_OFF & POSCMD_NONE);

int main()
{
    // Configure PLL prescaler, PLL postscaler, PLL divisor
    PLLFBD=63;            // M=65
    CLKDIVbits.PLLPOST=0; // N2=2
    CLKDIVbits.PLLPRE=0;  // N1=2

    // Initiate Clock Switch to FRC oscillator with PLL (NOSC=0b001)
    __builtin_write_OSCCONH(0x01);
    __builtin_write_OSCCONL(OSCCON | 0x01);

    // Wait for Clock switch to occur
    while (OSCCONbits.COSC!= 0b001);

    // Wait for PLL to lock
    while (OSCCONbits.LOCK!= 1);
}

It looks like the critical step you're missing is __builtin_write_OSCCONL(OSCCON | 0x01);

Also, looking at the math: 7.37*(76/(2*2)) == 140.03MHz which is slightly outside the allowed range, assuming that 140MHz is actually the maximum range (don't ask me why but for some reason it seems like it may be 120MHz).

If this still doesn't work then perhaps there's just an issue with your power supply. The internal FRC oscillator is unstable under temperature and voltage stress, so perhaps you should check to see if you have too much noise. This would make the FRC wonky as well as the VCO used in the PLL, preventing a lock.

If you look at table 30-18 in the pic24EP128MC206 datasheet, it tells you that over the temperature and voltage range you have about a ±1% for some models and ±2% for others. Figure 31-9 shows the variation with a stable voltage over a temperature range. There doesn't appear to be an analysis of voltage variation at a stable temperature.

If you're trying to get a stable run at a high frequency I would just grab a crystal.

EDIT (from comment): So from the sounds of your other posts about your conditions it sounds like you should look elsewhere for a problem. What's the frequency of the ripple? Did you size the internal Vreg capacitor properly? It sounds like since this is a locking issue and not a setting issue you're having some other problems with the board that aren't related to your code.

EDIT:

Glad this turned out to be the right answer! Good luck debugging the rest of the board!

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