Electrical – ARM assembly – Addition of specific bytes from word-size values

armassemblymicrocontroller

I'm trying to code a way to add specific halfwords from word-sized numbers in the ARM assembly language. For example, lets say I want to add the first 4 digits of r0=0x3B029BA1 and r1=0x0B54A361 or the middle 4 digits of r0=0x3B029BA1 and r1=0x0B54A361. I can't seem to make this work. This is a shortened example of what I have so far.

LDR r0, =0x3B029BA1;
LDR r1, =0x0B54A361;
LDRH r10, [r1];

I'm pretty sure there will need to be an offset for the address in the 3rd line of the code, but I haven't gotten past a halfword just getting into the register 10. Every time I run this code, the correct register values end up in r0 and r1, but nothing at all is appearing in r10. So before I do anything else, I just want to understand why this is happening.

Best Answer

LDR and LDRH are instructions for loading a register from memory. You are using R1 as a pointer to memory location 0x0B54A361. R10 then gets loaded with the contents of this memory location (which could be anything, but probably 0 if that particular memory location is not being used).

To move (copy) data from one register to another you should use the MOV instruction. You can combine the move with other operations by using instructions such as AND or ADD, because the destination register can be different from the source registers. You may also be able to apply a shift or rotate with the same instruction.

Related Solutions

Electronic – On Freescale iMX31, how can I translate SDRAM address to CPU address

To answer your base question, to get to the address of pin A10 of the memory you need to look at the memory map for the ARM device...

In this case it looking at the memory map:

0x8000 0000 -> 0x8FFF FFFF is mapped to CSD0 (SDRAM/DDR)

and

0x9000 0000 -> 0x9FFF FFFF is mapped to CSD1 (SDRAM/DDR)

You'd need to know what chip select was used in the PCB design to determine your answer as to which bank your DDR is attached to.

This implies that A10 is located as either 0x8000 0400 (as you mentioned) or 0x9000 0400.

As to why 0x8000 0F00 was used in place of 0x8000 0400...reading the datasheet for that memory implies, but does not state that the other address pins, A(n) are don't cares for this operation so the coder probably just tossed in an F there instead of figuring out that it was only a 4 that was needed.

I also don't find those 2 sections of the datasheet to contradict each other. The first is basically just saying that you need to reference the device's memory map to locate the real address where the memory is mapped so you can use that address as a base.

The second quotes tells you that bit 0 of the address corresponds to address pin 0 on the memory in this mode, which may not always be the case in normal operation. It may depend on the data/address width of the memory combined with alignment issues for the core.

Electronic – Assembly Language Program Design

Write a loop to shift the word left or right (doesn't matter) until the word is all zeros. The carry flag gives you the value of the next bit.

If carry is 1 and the previous carry was zero you're starting a new sequence of 1s. Then set a previous-was-a-first-one flag. (I assume that by contiguous you mean at least 2.)

If carry is 1 and previous-was-a-first-one is set you have a contiguous series, and increment your counter. Clear the previous-was-a-first-one flag.

If carry is 0 then clear the previous-was-a-first-one.

edit
Apparently "contiguous" doesn't require more than 1 bit, and then it's even simpler:

Set `previous' to `0`.
Shift left until word is all zeros.
If `carry` = `1` and `previous` = `0` increment counter.
Set `previous` to `carry`.

Best Answer

Related Solutions

Electronic – On Freescale iMX31, how can I translate SDRAM address to CPU address

Electronic – Assembly Language Program Design

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