amplifierbiasingcircuit analysisltspicetransistors
I have the following CC-CE (Common-Collector Common Emitter) cascade amplifier:
I am trying to bias the amplifier by using LTSpice. Here is my schematic below:
Apparently, from the displayed voltages, am doing something wrong. Unfortunately I can't figure out what am doing wrong, can somebody please help me by showing me how to bias the circuit properly In LTSpice??? Thank you for your help in advance.
BTW below is the dc operating point results:
For the circuit as drawn, the emitter capacitor has an impedance (magnitude) of
$$|Z_{C_E}| = \frac{1}{2\pi \cdot 1\mathrm{kHz}\cdot35\mu F} \approx 4.5 \Omega$$
at \$1\mathrm{kHz}\$ so your calculation of the gain isn't correct.
A more correct calculation of the gain at this frequency is
$$|A_v| = \left| \frac{R_C||R_L}{r_e + R_E||Z_{C_E}}\right| \approx 36.7 $$
According to the 'scope screen capture, the gain (magnitude) is about 33.5.
For your calculation to be correct, the capacitor impedance, at the frequencies of interest, must be much less than \$r_e\$.
The one way of finding the\$R_{OUT}\$ resistance in a proper way is shown here:
And what you should know that the LTspice first computes the dc operating point and then based on this result (gm, ro) the AC analysis is performed.
All this means that if you include \$\lambda\$ in your MOSFET model. You no longer can assume that \$I_{D1} = I_{D2}\$ and \$r_{o1} = r_{o2}\$
Because the lambda will also affect the DC-operating point also.
And the equation for \$R_{OUT}\$ is \$R_{OUT} = ro2*(1+gmR_S)+R_S \$
I/O Resistance of common source MOSFET with source degeneration
Best Answer
You did the same as what is in the original circuit.
However you're treating this amplifier as if it has a voltage output. You can treat it that way but you should then draw a small signal equivalent and figure out what the voltage gain will be. It will be quite large! That means that any DC offset in the circuit will be amplified a lot making the output clip to its minimum or maximum voltage. That's what happens here, it clips to the minimum.
You could tune I3 such that the output vc2 is at 2.5 Volts for example but don't be surprised if you have to make the value of I3's current a very precise value. Then change the temperature (for example) and the output clips again! Hmm, that's not very useful now is it?
OK, now what if we treat the output vc2 as if a current comes out. So fix the voltage (at 2.5 V, use a 2.5 V DC voltage source) and observe the current through that voltage source. Now you can simulate the small signal current gain Iout/Iin (Iin is the current from I3).
Here's how I would simulate this circuit:
simulate this circuit – Schematic created using CircuitLab