Block diagram of 16:1 MUX using four 4:1 MUX only

There is a far neater way to make a multiplexer, using a vector.

Example:

module mux(
  input wire a,
  input wire b,
  input wire c,
  input wire[1:0] sel,
  output wire y
);
  wire [3:0] mux = {1'b0,c,b,a};
  assign y = mux[sel];
endmodule

In this case you assign your outputs into the variable 'mux' and then the output will be the sel'th element in the vector.

A 3:1 mux doesn't really exist - you will always have a \$2^n\$ inputs where \$n\$ is the number of bits in the select signal. So you have to have some way of handling the extra condition. One option is to pick a fixed constant like 0 or 1 (which depends on what it connects to later - e.g. you might want a 1 if this is driving a bus which is considered 'idle' when high). Alternatively, you can add some form of error checking - e.g. have an additional output bit to signify that there was an error (or have the opposite logic and signify that the output is valid).

Example:

module mux(
  input wire a,
  input wire b,
  input wire c,
  input wire[1:0] sel,
  output wire y,
  output wire valid
);
  wire [3:0] mux = {1'b0,c,b,a};
  assign y = mux[sel];
  assign valid = (sel != 2'b11);
endmodule

In this example, when the sel signal has a value that is not 3, then the output signal valid will be high to indicate that the input was correct. Otherwise, if the input is 3, then the valid signal will be low to indicate that the input was invalid.

It's worth noting the reasons why using a vector in this way is preferable. Firstly it is quite easy to follow - if you compare your code to the example, its much clearer what is going on using a vector compared with having to decode the logic. Secondly, and more crucially, it allows for easier parameterisation - you can add a parameter to your block which will correctly scale the select signal and mux signal based of the parameter - although to do this, you would also have to make the input signals into a vector as well which would even then eliminate the need for the 'mux' variable.

Start by looking at the equation for a 2-in MUX:

$$ \begin{align*} M(A,B,S) &= A\cdot \bar{S} + B\cdot S \end{align*} $$

From this, you can derive some useful results (among others not listed here):

$$ \begin{align*} 1.~~~M(0,x,y) &= x\cdot y \\ 2.~~~M(x,0,y) &= x\cdot\overline{y} \\ 3.~~~M(x,y,0) &= x \\ 4.~~~M(1,x,y) &= x + \overline{y} \\ 5.~~~M(x,1,y) &= x + y \\ 6.~~~M(x,y,1) &= y \\ 7.~~~M(x,y,x) &= x\cdot y \\ 8.~~~M(x,y,y) &= x + y \\ \end{align*} $$

Now, your equation is:

$$f = \overline{x}z + yz + \overline{x}y = \overline{x}\left(y+z\right) + xyz $$

And you already have your required mux template laid out as:

^{simulate this circuit – Schematic created using CircuitLab}

You could use a number of different approaches. But let's just use our imagination only and work from that.

The last mux, where \$x\$ is the selection input, selects between the following two options:

$$\begin{array}{rl} \overline{x}&z+y \\ x & yz \end{array}$$

Well, if you look up at the table of "useful results" above, you can easily see how to implement these.

For \$\overline{x}\$, you see from the table that either #5 or #8 would do the job here. Depending on what you feel is appropriate for your answer, pick one or the other.

For \$x\$, you can see that either #1 or #7 will do the job. Again, depending on what you feel is appropriate for your answer, pick one or the other.

For me? To reduce fanout, I'll pick the ones that have constants. So #1 and #5. Here's the result:

^{simulate this circuit}

That's it, really. Sometimes, it helps you to just lay out a useful table for the mux function.