Electrical – Calculating series resistors for I2C/SPI lines to reduce EMI and ringing

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How do you determine if a series resistor is needed for I/O lines, and what value is needed? Where should the series resistor be placed?

My assumption is the resistor should be placed as close to the source as possible (in case of CLK and MOSI, it should be placed close to the master, etc). Is there a way to calculate series resistance needed? Would placing series resistors on the I2C affect performance since I2C relies on pull-ups?

My assumption is the following might be of importance:

  1. Output drive strength / output resistance of the IC driving that particular line.
  2. Trace length, impedance, inductance.
  3. Return paths.

Is there any formula?

If we keep the data lines short enough, are resistors still needed? If not, how short is short?

Best Answer

So many questions. Yes, when the signal is not bidirectional, place the resistor close to the source. You should also place a capacitor close to the load. You can start with the capacitor not loaded since it probably won't be needed.

Usually you determine the resistor value experimentally. Typical values for low-speed clocks are 0-56 Ohms. Higher speed clocks use lower values (0-33). The limiting factor is that the series resistor will slow down the rise time as seen at the load. If the resistor is too large, the timing will be off, or, for a clock, the signal will never reach full amplitude, and the system will stop working reliably.

Note that you can sometimes use a ferrite bead instead of a resistor.

For I2C, as long as the series resistor is much smaller than the pullup, it shouldn't have too much effect. For I2C and SPI, you should start with 0 Ohm series resistors and only increase the value if it is needed.

In general, controlling drive strength by internal registers is a much better way to go, because the internal, active circuit drive strength control gives more reduction in emissions with a smaller threat to signal integrity.

There is no formula, but simulation could be helpful to determine the limits of good signal integrity.

Trace length and impedance usually does not matter too much for I2C and SPI if the signals are not going off of the PCB and if your PCB is not unusually large.

Return path is very important for all clock signals. The best scenario is to route clock traces over a solid plane. Do not cross plane split boundaries, or if you do, bridge the split with a small capacitor to provide a low-impedance path for return current. If the plane is not GND, there should be a capacitor at source and load from plane to GND to provide a low-impedance return path. (There is usually already a bypass capacitor at both ends, so most of the time you don't need to worry about adding a capacitor just for the clock signal return current).

I2C seldom causes problems by itself. SPI clock has some potential for causing radiated emissions, especially if you run it off board on a cable.