We have an EEPROM with a 10,000 cycle life duration – Our application may write more than 10,000 times.
If we write to the same location over & over, is it only that single location that potentially fatigues and fails? Or would the failure extend over multiple cells?
I'm thinking an easy way to get round the limit is to dedicate 10 memory locations and use a rotating pointer. That would (I think) increase my potential write cycles 10x before it becomes an issue.
Am I heading down a good path, or is this totally the wrong thing to do?
Many folks are wondering why I don't just use another part, or one that's better documented. The EEPROM is built-in to this one. In our business, we're locked into a few suppliers who make very specialized ASIC's and who don't document their chips such that I can just read this in the datasheet. Their engineers all speak English as their 3rd or sometimes 4th language, so asking this kind of question is usually quite difficult and answers always taken with a grain of salt. They make up for these annoyances by selling stupid low cost chips. We have micro's available to us that cost about 3 cents each (no exaggeration). Most of our IC's are about $0.15.
Best Answer
EEPROMs don't wear out from writing, they wear out from erasing. If you look at the datasheet you'll notice that it states erase cycles.
Erase operations are block based. So an entire block of data is erased at once. And in your case you can do this at least 10k times to each block.
Your idea can work, but any wear leveling algorithm needs to be block based, otherwise it will not provide additional life to the chip.
Also, in my experience, that number in the datasheet is fairly conservative in order to guarantee coverage under all temperature extremes. So at relatively modest temperatures (close to ambient) you may get many more cycles. In one chip that we had this issue with, it was specified at 50k cycles, but we routinely got close to 300k before issues arose.
And finally, as part of your algorithm, after you erase the block, do a check to make sure all bits were reset. If not, then erase again (up to two times). We found that this greatly extended the useful life of the flash, as the failure mode is not hard, but more of a soft curve.
If you want to avoid all the extra algorithm stuff, you can usually find an FRAM chip that is a drop in replacement for most EEPROMs. They do not have the same wearout mechanism and can be erased/written 1 Trillion times typical.