Electrical – Generating negative BIAS voltage

biasdac

I am trying to generate a programmable Bias voltage from 0 to -2V with <0.5mV error.

I was able to generate a programmable positive bias voltage of similar range using DAC. based on this resource .

http://www.ianjohnston.com/index.php/onlineshop/handheld-precision-digital-voltage-source-detail

My idea is to have a negative 5 Voltage supply on the board and connect 0V to 5V, -5V to the ground, So everything is inverted, it will just give me the negative bias voltage with the same accuracy.

However, My problems is that The DAC requires SPI communication from uC which is 3.3 V. I could not talk to the negative section of the board since They are at completely different voltage level.

Is there anyway for me to get around this? Do i have to get another uC on the board just to talk to that DAC?

Best Answer

There are some DACs around which are able to produce a negative voltage directly. Most of them are older designs and often enough they are not recommended for new designs. You can find them easily if you filter them on Digikey (or anywhere else) based on the supply voltage and select only those who accept a negative supply voltage.

A different, more universal way is the one Brian Drummond suggested in a comment.

You use a positive voltage output DAC, and connect an inverting opamp in series and use that as output.

schematic

simulate this circuit – Schematic created using CircuitLab

There are some considerations you have to make. The output impedance of the DAC will lead to a gain error. This can be countered by buffering the DAC signal before feeding it into the inverter (some DACs have a buffered output). The resistors are critical, so they should be high quality low temperature drift ones, maybe using a matched resistor network makes sense here (the absolute value is not as important as the matching of both resistors).

For stability using a chopper opamp might be a good idea as well, they also come with a very low offset voltage, so you don't have to trim the devices.

A different approach is depicted in this application note by Texas Instruments. I have just looked at it briefly (to see it's different), so I can't comment on the benefit of their approach.

Related Topic