Electrical – Half bridge DC-DC converter circuit analysis

First comments:

1. Add a fuse. If the input polarity is accidentally reversed, your small diode near the input will clamp the input and burn.

2. It's not a good idea to tie your switch gates directly together when PWM driven, as the gate capacitances can interact with each other. For reasonably-low frequency power supply designs, this can be fixed with a small series resistor (10 ohms) close to each gate. Microsemi has an app note on parasitic gate oscillation that explains the issue quite well.

3. Ceramic capacitors should be derated 60-70% for voltage. (i.e. don't use 16V caps on a 12V output - use 25V). Also bear in mind that the dielectric material is important - X7R / X5R capacitors lose as much at 50% of their rated capacitance as their DC bias approaches the part rating. C0G and U2J dielectrics are largely immune from this. Kemet has an app note that mentions this (and other) gotchas with MLCCs.

4. The bottom of the IC (in MSOP, which is what your PCB appears to be using) has an exposed pad which should be connected to a large ground plane for thermal dissipation. This device doesn't have integrated MOSFETs, but the MOSFET drivers themselves dissipate power and need to be cooled. If you're not using the part with the exposed pad, you should be! It's always better to have more cooling than you may need. Since you're driving two MOSFETs, the driver will be doing a fair bit of work. (On your schematic, the exposed pad is a no-connect - it should be going to your bottom-side ground pour with vias at the pad).

5. From an EMI perspective, you've already done the most important thing of keeping your control circuitry away from your power paths. An isolated island for diode cooling shouldn't do bad things, since I don't see it appreciably changing any loop dimensions. A hard-switched buck is going to generate EMI no matter what you do, and your diode is going to be lossy. (If cost isn't a huge issue, the gains you get from a synchronous buck in terms of power loss in the lower switch vs. a diode are worth the extra investment.)

6. Make sure that your overcurrent shutdown limit is below the 4.1A maximum DC current that your output inductor can handle. I didn't reverse any of your calculations to figure this out myself - too tired this morning :)

7. You really should have some sort of output overvoltage protection. Ideally you want an SCR crowbar, in case you have a series MOSFET failure. The SCR clamps the DC input and blows the fuse (which you need to add per #1) while preventing your downstream components from all blowing up / catching fire due to receiving 9-15V instead of 5V. Also it protects you if your feedback goes open-loop (missing or bad part, bad soldering, etc.)

Flogging the FREDs

Voltage fed converters with transformer isolation will exhibit ringing in the secondary. Ringing is caused by parasitic inductances and capacitances in the circuit, with the dominant elements will being the transformer leakage inductance (\$ L_ {\text {Lk}}\$) and junction capacitance ( \$ C_j\$)of the bridge diodes. The diode data sheet shows \$ C_j\$ of 32pF. I'm going to make a naive guess at \$ L_ {\text {Lk}}\$ of 500nH, but it will have to be measured to really know. So, an LC of 500nH and 32pF is what must be snubbed.

Spike amplitude without snubbing will be \$ 2 n V_ {\text {in}}\$, where \$ n \$ is transformer turns ratio and the factor of 2 is what you get for a high Q resonance.

There are different types of voltage snubbers; Clamping, Energy transfer resonant, and Dissipative. The clamping and resonant types require more parts and some involvement of active switches which I think make them impractical for this case. So, I am only going to cover dissipative snubbers because they are the most simple and work well with passive switches (like diodes or synchronous rectifiers).

The form of dissipative snubber that I will cover is a series RC placed in parallel with each bridge diode.

Some facts about RC dampening snubbers:

• They are all about impedance matching. You don't get to choose the snubber resistor value \$ R_d\$. The parasitic LC determines that for you by characteristic impedance Zo.
• You do get to choose the value of the snubber cap \$ C_d\$. That's important since the cap value sets the snubber loss (\$ P_ {\text {Rd}}\$)as \$ C_d F V^2\$ . Where V is the pedestal voltage and F is switching frequency. The snubber cap must provide a low impedance at the LC resonance of the parasitics, so it needs to be several times \$ C_j\$.

Some guidelines, and what to expect with RC dampening snubbers:

• For \$ L_ {\text {Lk}}\$ of 500nH and \$ C_j\$ of 32pF, Zo will be 125Ohms. So, \$ R_d\$ would be 125 to match Zo. You may have to fine tune this a little since \$ C_j\$ is non-linear and falls off with reverse voltage.

• Choosing the snubber cap \$ C_d\$ : Choose \$ 3 C_j\leq C_d\leq 10 C_j \$ . Higher values in the range do provide better dampening. For example, \$ C_d\$ of \$ 3 C_j\$ will result in a peak diode voltage of \$ 1.5 n V_ {\text {in}}\$, while \$ C_d\$ of \$ 10 C_j\$ will result in a peak diode voltage of \$ 1.2 n V_ {\text {in}}\$.

• Dissipative snubber performance will not improve for \$ C_d\$ values greater than \$ 10 C_j\$.

Power loss \$ P_ {\text {Rd}}\$, with a pedestal voltage of 1250V and F of 50KHz.

• If \$ C_d\$ is \$ 3 C_j\$ or 100pF, \$ P_ {\text {Rd}}\$ = \$ C_d F V^2\$ or 7.8W.
• If \$ C_d\$ is \$ 10 C_j\$ or 330pF, \$ P_ {\text {Rd}}\$ = \$ C_d F V^2\$ or 25.8W.

\$ C_d\$ of \$ 10 C_j\$ gives the best dampening with peak voltage of 1.2 time the pedestal voltage, but you can save some power with smaller snubbing caps if you can stand the higher peak voltage.