circuit analysiscircuit-designoscillationoscillator
I have just seen two Colpitts oscillators from the page as below.
However, the page is not written in English. I tried to translate it into English but I could not understand it.
Could anyone explain why there is a resistor in the first case and a capacitor in series with inductor in the second case?
In addition, if you have a link explaining how each circuit works, that would be great.
Thank you.
It's not the same circuit on the emitter. You've got a 1k pot in series with a 1k resistor and the pot wiper connects to a grounding capacitor. You've also got a 10pF cap where it is 100nF in LTSpice.
I'm not saying any of these matter but you can't possibly make comparisons with these glaring disparities.
EDIT
Following comments from the OP, the problem I think arises from the new "intended" operating frequency of the circuit (he uses a 10pF cap on the multisim circuit to set the resonant frequency whilst the LTSpice circuit has 100nF). Added to this is the lack of emitter capacitor - the multisim circuit shows it connected via the wiper of a pot set midway and this will drastically reduce the gain and prevent or delay oscillation. Remember that the collector has to generate enough signal to drive the 10nF capacitor (C3) and at a much higher frequency this 10nF (via C5, 1uF) will probably look like a short circuit - the gain of the transistor has to be greater than 1 for it to begin oscillation and with no directly connected emitter capacitor and a 10nF effectively connected to the collector I think the gain will be less than unity.
I'm not totally familiar with this type of Colpitts oscillator but it seems to me that the LTSpice circuit should oscillate at about 41kHz whereas the MS circuit should operate at about 4.1MHz - this isn't going to happen with a 10pF - its reactance at 4.1MHz will be nearly 4 kohms and this will get "battered" by R1 and R2 in the imedance versus resistance race. Do the sensible thing and start with the same circuit. On the LT circuit, the 100nF will have an impedance of about 40 ohms at 41kHz and therefore not be hardly affected by R1 and R2.
If you alter your diagram to look more like this it should work:
In your diagram, instead of a voltage divider and a capacitor you only have a single resistor. This won't work because the output of the Colpitts oscillator dips below 0.6 volts, and anything less than ~0.6V won't be picked up by an NPN transistor.
In the diagram, you can see that I've coupled the output of the oscillator with C2 to a voltage divider, with R1 and R2. The voltage divider adds a DC offset of 9V to the base of Q2. This way, the voltage at the base now ranges from 3V to 15 volts instead of -6V to 6V. Since the signal is always above 0.6V, Q2 passes it.
The output uses C1 to decouple the DC from the sine wave, leaving you with your original 6V amplitude sine wave, just with amplified current.
You can change the values of some of the components around if you want, but C2 should optimally be around 1/(2*pi*500KHz*R2), and C1 around 1/(2*pi*500KHz*R3).
Best Answer
First case: The Colpitts oscillator is sort of a reverse on the Hartley oscillator. Instead of a tapped coil, it uses two capacitors in series to provide the feedback point.
Because feedback is through the capacitive leg of the LC tank circuit, the total capacitance of this leg is the series combination of C1 and C2, so that C = (C1*C2)/(C1+C2). The operating frequency is controlled by the tank circuit: ω = 2πf = 1/√(LC)
Because the transistor cannot be biased through the capacitors, we need a separate DC biasing circuit for the transistor itself. That is the purpose of the source resistor in this circuit. Of course, parasitic capacitance in the resistor and the transistor will have a small effect on operating frequency. However, this can be balanced out by careful adjustment of C in the tank circuit.
Second case:(Source is here)