If I have four inputs D0, D1, D2 and D3 and I want to give priority to D2, then how would I design with my priority encoder? Similarly if my priority is D1 then what should I do?
Electrical – How to set priority in priority encoder
digital-logic
Related Solutions
The solution is found by searching for "encoder" on Wikipedia:
Key point, the only valid inputs are when exactly one of the inputs is high. That means there are lots of don't cares in the output columns of the truth table.
One approach would be for each of the 25 inputs to either show 0 if deselected, or it's own 5-bit priority value P(i) if selected. Throw all the intermediate values into a sorting network that returns the maximum priority shown in a particular cycle. If you then have a comparator for each input to see if it's show priority equals the maximum as a single bit per input, then use a classic priority encoder technique (e.g. bitscan) on those bits.
Total storage for all priority bits is 25*5 as @Dave_Tweed mentions.
Best Answer
I'm assuming inputs are active high. If not, you may invert them or select different gates below.
Start by generating a set of 4 signals N1-N3 indicating whether the highest single priority input is inactive, or both of the top two, or all of the top three. Think "nor" gates.
From that, determine for each input whether is is active while all higher-priority inputs are inactive. Think "and" gates.
If you want a binary-coded output, identify for each bit position whether there are any inputs whose code should have a "1" in that position, which are active at the same time as all higher-priority inputs are inactive. Think "or" gates.
If you need to be able to e.g. have a priority-reversing input, that should be handled with logic placed before the first set of "nor" gates. Instead of feeding "nor" gates direct from the priority-encoder inputs, generate a set of signals that means e.g. "input #3 is active, and it should have priority over #2". Feed the "nor" gate associated with each input with all the signals that would indicate that a higher-priority input is active.
This approach may not always yield the minimum possible amount of circuitry, but it is straightforwardly adaptable to a wide range of requirements, and does not impose any particular relationship between priority and output encoding.