Okey, let's try this again. The board I am working with is the Smartfusion2 (M2S010-FG484 package) Starter Kit. Link-> here. My main question is If I can interface an analog signal to a pin of the breadboard the BSB provides without having to use an external ADC. I want my FPGA to work with a binary digital signal translated from a analog one.
In one of the documentation files, it is stated the signal name assigned to a pin of the breadboard area, and its name is ADC. As I have pointed out before there are several signal with this name. File can be found here.(page 8). This leads me to think that maybe it is possible to do what I want to do. However, after noting that the web page of the SF2 dev kit specifies it has an ADC whereas in the case of my board, there is no mention, I dont know what to think.
I am a newby in this and I do not know a lot about I/O standards and interfacing signals. Let me know if you need more info about my question.
thank you in advance.
Best Answer
Yes the pin is called "ADC_xx" but as Richard pointed out it doesn't appear anywhere in the documentation. Note though in the "connects to" column there it says they connect to the FDDR and GPIO pins. My guess is that the naming convention is standard across their breadboard areas and it's part of some scheme to help developers keep consistent across their pin-out constraint files (maybe). Microsemi also has the "Fusion Mixed Signal" FPGA and their original smart fusion FPGA's which probably uses the same breadboard area on their dev kits and possibly the same board layout if the pin-outs align for dedicated lines like power or programming.
Note there is a huge difference in their product lines. From this EE times article
Two side notes
1) I'd recommend finding those pins on the pinout sheet but when I tried to search for it I got a "file not found" notice. This is a big warning sign and you may want to contact their Application Engineers to see if its being supported.
2)
Application notes are your friend. Learn about the basic standards like GPIO or LVDS and things like SPI booting and JTAG. Also remember that on an FPGA or MCU's, especially smaller packages, pins can share functionality such as boot serial pins with GPIO so extra care is needed at the board level to protect the dual functionality and settings in the constraint files.
SoC is all this confusion with the nightmare of fancy busses. When you are looking at these dev kit pin-outs compare them directly to the specific pin-out of the IC you're using (see point 1)