Added: The increased information shows that a solution is possible using this IC with somewhat reduced functionality - mainly delay being limited to a restricted range under "automatic" voltage control with coarser steps being applied manually.
The comments which the OP made re VC using circuits from page 17 of the data sheet are highly appropriate.
This very simple circuit and annoyingly complex relationship from fig 10, page 17 of the data sheet, does indeed show an essentially complete solution across a limited delay range. The expression is reducible to one of the form
t_delay = k1 / (k2-Vc)
ie delay is inversely proportional to the inverse of the difference between a fixed voltage and Vc.
This could be refined to delay proportional to control voltage with more external control circuitry. ie
by varying Rset effective so that Iset tracks Vcontrol you get linear delay control with voltage. Rset is effectively replaced with a voltage control voltage source. This can be further expanded on if desired.
Larger steps in delay may be provided by switching V_DIV in Vcc/16 steps.
The material below is still correct but less relevant to the reduced range requirement.
The delay from a LTC6994 can be set to a predetermined value in the range ~= 1 uS to 33 seconds by both
To vary the delay in response to a varying voltage is very much harder as the delay can be swept over only a 16:1 range with SET-pin sink-current variation, and must then be stepped by a multiple of 8 by
incrementing the voltage on the DIV pin by a 1/16th Vcc step, and simultaneously
decrementing the sink current out of the SET pin by a factor of 8
and starting again.
There are a number of other ways of meeting your described requirement which may be better than this one. Knowing what you actually want will help with proposed solutions. See below.
The LTC6994 will potentially* do what you want, but only with additional control circuitry and some "head scratching". The IC achieves control using two variable analogue inputs - it has a ~= 16:1 current controlled sweep range, plus a voltage controlled programmable divider whose division ratios increase by a factor of 8 at each step (1 8 64 512 ...). This means that achieving a required division ratio is somewhat akin to "juggling priceless eggs in variable gravity". ie to get smoothish variation with increasing Vin, as Vin varied you'd need to increase i_set by a factor of 8:1, then increase Vdiv by a step of Vcc/16 while decreasing i_set by a factor of 8 and continuing. "Steps would occur". Also - from 1 to 8 us you get 1 uS/delta-V change, from 8 to 64 uS you get 8 uS per delta-V change, from 64 to 512 uS you get 64 uS per delta V change, ...
A more complete specification may help us give you a better solution.
Telling us what you actually want to do rather than asking if a solution meets your essentially unknown to us need is liable to get better results.
Do you want a smoothly varying delay with voltage?
What resolution and accuracy do you require?
What response time and settling time?
What ... ?
If you are prepared to control it with a microcontroller you could achieve relatively transparent control using a single input control voltage. Otherwise it would be "challenging" [tm].
The formulas and notes on page 11 of the datasheet make it clear that
The basic delay is variable from 1 uS to 16 uS
The delay is based on a controlled current, not a voltage.
(You can use a VV to make a VC but effectively the IC wants to see a variable resistor to ground at the "SET" pin and applies ~= 1V to it to create the desired current.)
The IC then scales the above 1 - 16 uS delay by a factor of
Division ratio = 2^(3 x (Vdiv / Vcc)) where Vdiv = voltage on Vdiv pin.
ie it establishes a 4 bit (16 level) value from Vdiv,
uses 1 bit for polarity
and uses the other 3 bits to select 1 of 8 division ratios
with ration increasing by a factor of 2^3 = 8 each time.
= divide by 2^3x for x = 1 2 3 4 5 6 7 8
= divide by 1 8 64 512 4096 32768 262144 2097152
The smallest delay is thus 1 uS x 1 = 1 uS and
the largest = 16 uS x 2097152 = 33.55443s
This diagram, from the data sheet, shows how I-set controls the delay over a limited range and how a voltage controlled divider then multiplies that delay.
*-Pun noticed :-)
As is usually the case with a timer task like this, this would be an easy job for a small (6 or 8-pin) microcontroller such as a PIC10. But if you're not familiar using a microcontroller, that's a fairly steep learning curve.
So instead this circuit should do what you want.
Initially, both flip-flops are reset, and the \$\small \overline{\text{Q}}\$ output of the second flip-flop is high, so the 74HC03 pulls the EN line to ground (the 74HC03 is open collector, since the EN lead is pulled high by the Powerboost 500 module).
When the input goes high, the 74HC221 triggers. (The 74HC221 is a non-retriggerable version of the 74HC123.) \$\small \overline{\text{Q}}\$ of the '221 goes low, setting the first 74HC74 flip-flop. When the timer expires, the combination of the '221's \$\small \overline{\text{Q}}\$ high and the Q output of the first flip-flop high sets the second flip-flop, enabling the EN lead through its pullup on the Powerboost 500 board.
Pushing the reset button resets both flip-flops, allowing the sequence to repeat.
Because the circuit uses a 74HC221 instead of the retriggerable 74HC123, even if the input drops to 0 and then goes high again during the 10 second timeout, the timeout will not be extended. If that is not the behavior you want, substitute the 74HC123 -- it has the same pinout. Also, if the input stays high longer than 10 seconds, that won't affect the timeout either.
The circuit runs on 3.3V, assuming you use 74HC logic (not LS or HCT).
Best Answer
That is the correct functionality, per page 14 of the datasheet:
Because the delay timer is reset on each edge transition, the LTC6994-2 is also operating as a pulse discriminator. For a valid pulse to be transmitted, the minimum pulse width must be at least 1 tdelay.