Verilog can handle the chip select approach - the high impedance state is called Z.
However, whether synthesis can handle it depends on whether whatever you're trying to synthesize to has the necessary tristate drivers available, and whether the synthesis program knows how to use them.
Disconnecting inputs from the bus isn't necessary; just the outputs.
It worked this way back when I specialized in ASIC and FPGA logic simulation using Verilog.
Your mapping the address bus method isn't clear enough that I can say much on that.
When designing a modern computer / operating system combination one of the things we want to do is run multiple programs at the same time. One of the problems that you would run into designing this system is that all your programs want to assume they have access to all the memory they want, and they don't coordinate what addresses they use.
The solution to the problem is a system called virtual memory. The virtual address space is the address space the operating system makes available for a program to use. When a program tries to access virtual memory at say, address 1024, they don't get to access the physical memory address (the addresses that go out on the wires to the ram chips) 1024. Instead there is a mapping system.
The operating system handles all the mappings, so that two different programs can both access what they consider address 1024, but process 1 might have its virtual address 1024 mapped to physical address 2048, while process 2 might have its virtual address 1024 mapped to physical address 4096.
In order to keep the mapping information manageable, the operating system maps memory in "chunks" called pages. 4096 bytes is a very common page size. In the example you site, a certain process has a single page, located at virtual addresses 4096, that is 4096 bytes in length (extending to virtual address 8191), mapped to the physical address 0 (since the page is 4096 bytes long, the mapping extends to physical address 4095)
The actual size of the virtual address space is not specified (it must be at least 14 bits wide because the address 12287 is mentioned), but that hardly matters. One thing for sure, it is not a 12 bit addressing system. That's just the size of a virtual memory page, the smallest chunk of memory the operating system will manage. The addresses 8192 through 12287 are just other virtual addresses a process could access.
The author asks the question "what happens if there is an access to memory that is not mapped?"
In a computer without a virtual memory mapping system, the hardware notices that accesses to addresses not connected to physical ram are errors. The hardware signals the operating system of the offense. This process is called an error trap. The operating system would then print the message "Nonexistent memory referenced" and terminate the process. That's the suitably rude message.
In a computer with a virtual memory mapping system almost the same thing happens. Since most programs don't use all the memory that they could possibly address, the operating system doesn't map all of a process' virtual memory to physical memory (also, most computers have more virtual address space available then total physical ram installed in them). So when a process tries to access a virtual address in unmapped memory, the hardware notices there is no physical memory mapped to the virtual address in question. The operating system is signaled, it prints a rude message, and terminates the process.
This mapping and error trapping system not only allows multiple processes to have their own views of the address space, it also allows the operating system to contain and protect the running processes from each other. Even though they may be using the same virtual addresses, the operating system keeps different processes mapped to different physical addresses. That way is isn't possible for a process to (accidentally or on purpose) access or overwrite the memory of any other process. This keeps buggy programs from taking out your whole computer when they crash.
Best Answer
The statement as it stand is false or least incomplete.
Normally an I/O instruction activates some special pins on the controller to distinguish the I/O operation from a memory operation.
The statement above seems to assume that the I/O instruction then uses only part of the 32-bit address bus and thus less address decoding is needed. Without mentioning this the statement is, by itself false.
Note that, especially in the early days of the micro-controllers, whole sections of the address map would be mapped onto a few peripherals by using a few address lines to select all peripherals. e.g. address lines 15 and 14 would select one of three peripherals leaving 16K as address space.
This technique is still widely used.
These days a 32-bit processor has 2G address space but many micro-controllers have less then 1M of memory (in Flash and RAM) requiring only 20 address lines. This leaves many spare address lines for this type of sparse decoding.