Electrical – Open-collector comparator with hysteresis and LED indicator at output

comparatorhysteresisopen-collector

I am trying to choose the correct resistor values to make Vout go high when Vbatt falls below 18V and go low when Vbatt rises above 20V. I've built the actual circuit and my measured values are 18.0V for the lower threshold and 19.6V for the high end. I used TI's reference design to choose the values for Rx, Ry, and Rh. Since the LM293 is open collector at the output, I read through the post here trying to account for the discrepancy between my measured upper threshold and my theoretical threshold. I believe D1 is the cause of my calculations being incorrect, but I am unsure how to analyze the circuit while accounting for it. Using the NSPW500BS model in LTspice for D1 gives me very accurate simulated values compared to the measured values of the actual circuit.

This circuit is a modification of an existing circuit, and I am restricted to only changing the five resistor values. How do I need to modify my calculations to achieve a desired range of hysteresis?

schematic

simulate this circuit – Schematic created using CircuitLab

Best Answer

When the output of the open collector comparator is OFF then output high voltage of the comparator is determined by the LED bias resistor, the forward voltage drop of the LED by the small current through the feedback resistor into the voltage divider.

To make your analysis simpler do consider taking the LED mostly out of the equation by placing another resistor in parallel with the BIAS resistor and the LED. This additional resistor would be from the +5V to the comparator output. A good starting value would be to use 1K ohm as long as the comparator is capable of sinking the current from both the added 1K branch and the LED branch when the output goes low. At the low current that the 715K feedback resistor takes I would guess that the voltage drop across the added 1K resistor is small enough that the LED never biases on at all and can be neglected in the analysis of the high level output mode.

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