A circuit that will do what is wanted, or as much as what is wanted as has been revealed, is shown below.
This circuit is much simpler than it sounded like it was going to need to be, due to the revelation that the USB power feed could easily accomodate a Schottky "blocking dioe" and still meet the Vout requirement. If this diode had had too high a voltage drop to be acceptable then a circuit withtime delays and current flow direction detection would hav ebeen needed. It can be surprising how much difference a little more information can make to the solution of a problem.
Battery feed at top. USB power feed at bottom.
USB power is fed to load via Schottky diode D1. Power may be fed via Ja and the LDO regulator or via JB as desired.
If feed via JB is used the LDO must survive with external voltage on its output when it has no input. If necessary (depends on LDO) adding another Schottky diode across Ja "pointing upwards" would apply the same voltage across either side of the LDO and minimise quiescent current (in most cases) when USB power is in use.If absolutely necessary another FET could be used to block USB feed from LDO but should not be needed. LDO could be put above Q3 BUT then battery supplies LDO quiescent current at all times = poor.
When USB voltage is absent Q3 = P Channel MOSFET is turned on by R4, feeding battery voltage to LDO and thence to Vout.
When USB voltage is present Q1 is trurned on by R2/R3 and this turns on Q2 (usually held off by R1) which clamps Q3 gate high turning it off, thus disabling battery feed. USB power feeds via D1 either via Ja and LDo or Jb as above.
Battery current when USB connected:
Changed R1, R4, R5 to nominal 1 megohm each to reduce battery load when USB in use. A small MOSFET for Q2 and/or some more thinking will reduce required standby current.
USB on, Q1 on, About 5 uA via R5 to turn Q2 on. About 5 uA via R4 to turn Q3 off. R4 can probably be 10M if slow response OK. ( At R4 = 10 megohm if gate capcitance on Q3 is say 10 nF then time constant for turn on = RC = 1E7 x 10E-9 =~ 0.1 second. Depending on =FET gate threshold it MAY take a few 10ths of a secind for battery to turn on when USB is unplugged. This could dropout powered cct unless a large enough output cap was provided. At R4 = 1m the time constant is about 10 milliseconds and a "usual" sort of cap on output rail would suffice.
Can be "tuned". Q1 on removes voltage from R1. 10 uA quiescent when USB is on =~ 90 mAh/year. This is about 3% of battery pack capacity. Small but annoying.
Q1, Q2 = almost any jellybean bipolar. Q3 = P Channel MOSFET. Vthreshold << Vbattery. D1 = Schottky eg 1N5817. LDO to suit.
Roll your own LDO with MOSFET and eg TLV431 can have about 100 uA quiescent when running and essentially zero dropout voltage. Can be much lower with lower Iq ref diode.
BUT
When you can get eg Microchip's VERY nice TC2104 LDO for under 50 cents in 1's, making your own makes less sense.
Added 9/2015
Kar asked
... why are the BJTs needed?
Why not just have a MOSFET and a diode, and that's it?
@Kar Good question.
The MOSFET solution is a good one but it is slightly more design-demanding than may be apparent, whereas the bipolar solution uses a few more components but is easier to ensure operation ioj all conditions.
Tpo use the MOSFET as shown the FET's Vgsth must be chosen to suit.
Battery max voltage (assuming his AA cells are Alkaline) is 1.65V (new cells) x 4 = 6.6V.
In a few cases even maybe 1.655V so say 6.8V for 4.
USB is say 5.3V max when on and 0V when off after any capacitors discharge.
But critical here is not USB Vmax but USB_on_min
USB_on_min = say 4.8V.
Under that condition FET must be off, so
FET Vgs = (6.8-4.8) =~~~~ 2V worst case.
The FET MUST NOT turn on at Vgs = 2V.
Battery min is say 4V and USB low falls to 0V "after a while" so FET must turn on at Vgs = 4V. That puts the FET Vgs_off_max and Vgs_on_min in a fairly narrow 2 to 4V range.
That's certainly doable by correct choice of FET - but datasheet must be chacked to ensure that worst case spread lies in the desired range.
The designer needs to be aware that design is needed!
In the bipolar case the USB Von_min is very easily accommodated by Q1 and if desired full turnoff can occur when V_USB is say 2V so changeover to battery is better defined.
So overall, the bipolar addition adds 2 x Q and 4 x R (small but non trivial) for the sake of better flexibility and designability.
BUT the MOSFET only solution is a good one as long as the complexity that goes along with the simplicity is properly understood.
Page 2 of this datasheet tells the story.
Under absolute maximum ratings it states that the maximum reverse voltage of base and emitter is 5V. You have exceeded this by using 12V and although the base-emitter region is probably still intact (due to the 100k resistors in your design) you can't expect leakage current to be insignificant.
Don't expect simulation models to go beyond (or even get near) real-world issues due to absolute maximum ratings - models expect you to obey rudimentary principles and this is one of them.
Try a 5V control signal.
Also, when power is off you won't be able to conduct much signal thru from emitter to collector because you are relying on the base-emitter junction to be foward biased and this requires at least +0.7 volts on the emitter to do so.
Best Answer
No, when the USB cable is disconnected net VBUS is floating. Its voltage has no defined state. You can add a pull-down on VBUS so it is approximately zero.
However an NPN transistor would be a more suitable choice here.
simulate this circuit – Schematic created using CircuitLab
This is essentially the same schematic as yours, however the EN-pin switching is being done on the defined VBUS state versus the disconnected Hi-Z one.
The override switch as configured in your schematic allows you to disable the regulator at any time. If you however want to override the USB disable function you are adding, all you need is a SPST switch.
Aside, with the PNP option, your also burning 500 uA continuously during the operate from battery mode (if you added a suitable pull-down on VBUS, but that may already be there internal to charge IC). In the NPN case, the override consumes no quiescent current when USB is disconnected.