Some types of non-volatile memory device use error-correcting logic which adds an extra few bits to each programmable chunk (e.g. 5 bits per 16, 6 per 32, 7 per 64, 8 per 128, etc.) Generally the error correction code is chosen so that all bits blank is a valid representation; in some cases, but not all, it may also be chosen such that all bits programmed is also a valid combination. For simplicity, I'll assume a code with which guards each group of 4 bits with 3 guard bits. Compute the three guard bits guard bit as being the xor of either data bits 0+1+3, 0+2+3, or 1+2+3. I'll also assume that a blank word is zero.
The 16 possible code values are thus
3210 ABC 3210 ABC 3210 ABC 3210 ABC
0000 000 0100 011 1000 111 1100 100
0001 110 0101 101 1001 001 1100 010
0010 101 0110 110 1010 010 1110 001
0011 011 0111 000 1011 100 1111 111
When a memory nybble is read, the system can see what bits ABC should be according to the table. If one of the seven bits in the word is misread, the combination of ABC bits that don't match the computed value will indicate which bit was wrong.
Suppose a memory system used the 16-bit code shown above, and one wanted to overwrite a byte value of 1110 (ECC bits 001) with a value of 1000 (ECC bits should be 111). The net effect would be that the system would write 1000 with ECC bits of 001. When the data is read back, the system would see that for a value of 1000, the ECC bits should be 111 but are instead 001. The fact that bits A and B are wrong means bit 0 of the data was wrong and should be flipped; the system would thus read the value as 1001 (whose ECC is correctly 001).
In most cases, there should be enough flexibility in the design of an error-correcting code to permit both all-bits-clear and all-bits-set to be regarded as valid combinations. Some systems do not do so, however. If an error-correcting code would require an all-bits-programmed word to have two or more of the ECC bits blank, then an attempt to obliterate a word which has those bits programmed would likely visibly fail; attempts to program many other values would likely yield a state which was only one bit error away from failure rather than two.
I really wish memory designers would allow for data to be obliterated even if they don't allow most other overwriting patterns. Especially with NAND flash, it would make some operations a lot easier.
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Not all linux specific, but I think it would be very useful reading to set up your software environment as well for understanding what you are doing when doing it.
Best Answer
If your chip is respoinsive and you can access it using ST-Link utility or uVision the problem is that flash memory protection is enabled and attemp to erase, write (ans maybe also read) flash by debugger fails as expected. Probably in utility you also do not see code (instruction bytes) but you see only memory full of zeros or full of ones.
In ST-Link utility select in menu
Target>Option bytesand selectRead out ProtectiontoLevel 0and in the bottom pane selectUnselect allto disable read and write protection of all sectors of flash. Then confirm byApplybutton.