Electrical – Synchronize internal DAC to I2S on STM32F4

Oh, be careful with the NXP SPI controllers. I can only tell from experience with the LPC1768 but it seems that at least one of the two SPI peripherals are identical.

As said, there are two SPI controllers in your chip. I can't tell much about the first one (the ordinary SPI controller without FIFO). It may just work for your task, but - no FIFO, so very high CPU load.

The second one, called SPI1/SSP, is tricky because it demands that the chip-select line goes high between each transfer word for at least one clock cycle. This makes it impossible to transfer a continuous bit-stream without gaps. You will not be able to directly interface I2S in SPI mode.

You can however configure the SPI1/SSP in TI SSI mode. In this mode the chip-select line becomes a frame syncronization signal that stays low most of the time but pulses high on each least significant bit. The transfer will be continuous without single bit gaps so it interfaces nicely with your I2C codec.

You may be able to derive the I2S Word-Select signal from this using a single divider flip-flop. Deriving directly from clock like you suggested would work just as well.

I suggest that you take a look at figure 26 in the user manual UM10120:

Ok so I might not have found a way of actually reset the DMA pointer without disabling the stream (yet) but I found more information, and a way of circumventing the problem.

• When you use circular mode with pointer incrementation, the address of the data to be transferred is calculated from the DMA_SxNDTR register (which contains the remaining number of data to be sent) and the DMA_SxM0AR register (which contains the ase address for the DMA stream). The pointer is the base address offsetted by the size of the buffer minus the DMA_SxNDTR value. If you reset DMA_SxNDTR to the size of the data, you reset the pointer to the base address (from what I could understand, I could be wrong). However, you can't change the value of the register unless the stream is disabled. So to reset the pointer, you would have to disable the stream, reset DMA_SxNDTR and then reactivate the stream.
• You could however read the DMA_SxNDTR register to know in which part of the buffer you are, so that you can refill only the other half. In that case, the peripheral would receive the remains of the old sound, then start reading the new sound safely.
• A third possibility would be to read the DMA_SxNDTR and start refilling the buffer only when there's no data left to transfer. It adds in latency but avoids the old sound remains to be played.

The last solution would look like that :

void HAL_GPIO_EXTI_Callback(uint16_t pin)
{
    if(pin == GPIO_PIN_13)
    {
        changeSound(&sound);
        while(DMA1_Stream4->NDTR >= 1);
        HAL_I2S_DMAPause(&hi2s2);
        fillBuf(&buf, &sound);
        HAL_I2S_DMAResume(&hi2s2);
    }
}

I haven't tried it yet so I can't be sure if it works or not, I'll update this answer as soon as I do.

Sources :

• sections 9.3 and 9.5 of the reference manual of the STM32F4
• STM32F4's application note on the DMA controller