Why is AND gate equivalent of positive logic OR gate in negative logic?
There is no real 'why', it is simply the case. Take the truth table of an AND gate:
0 0 => 0
0 1 => 0
1 0 => 0
1 1 => 1
Now invert all values (as if you place inverters on the two inputs and the one output):
1 1 => 1
1 0 => 1
0 1 => 1
0 0 => 0
As you can see, this is the truth table of a OR gate.
If you want to think deeper, consider that an AND gate 'requires' all its inputs to be high to make its output high, a single low is sufficient to get a low on the output. You can almost hear the 'OR' logic in the last part of that sentence, but applied to 0's and resulting in a 0 at the output.
I do not get why we express AND operation as OR gate in negative logic.
That's not a question.
And what is the advantage of negative logic systems?
Logically speaking: none. But it can sometimes be enlighten the mind to think of a particular circuit in negative terms. And for electrical realizations of logic gates: the electronics do not care whether we call 0V a logic 0 or a logic 1.
You are confusing logical and electrical models.
A NOR gate is a NOR gate, with the truth tables as you show in your question. The entries in that table are logic values. Logic values are mathematical constructs, that have no intrinsic relation with the real world.
When you take let's say a 74HC00 chip it contains 4 2-pinput gates. With the by-convention standard assignment of voltage levels to logic values (0V=0 5V=1) those gates behave as NANDs. But when you use the less common assignment of 0V=1 5V=0 the same gates behave as NORs.
The table below is taken from the 74HC00 datasheet. It shows the truth table for a single gate, but note that it states that this table holds only when you use the standard assignment of voltage levels to logical values.
Summary: there is no such thing as a 'negative logic NOR gate'. There are NAND and NOR gates, which are mathematical constructs, and there are physical circuits. Whether a specifc circuit implements the NAND or the NOR function depends on your choice of which voltage level correspons to which logical value.
Best Answer
What is de Morgan's Rule for AND Gate?
Answer:
AND = the negative logic rule using the OR gate.
Whereas the AND could replace an OR gate using the negative logic, where 1=true, 0=false for positive logic.
These two reciprocal equivalent rules are called de Morgan's Rule
simulate this circuit – Schematic created using CircuitLab