Electrical – Why is propagation delay a function of supply voltage

If the delay down the copper wire is less than the encoding delay though, surely bits will be being received too quickly at recipient end, faster than they can be decoded into a digital stream which could be buffered?

I think the key point you're missing is that it's entirely possible for more than one bit to be "in flight" on the wire at any given time.

For example, if the wire is 100 m long, and the velocity is 192 x 10⁶ m/s, and the bit rate is 100 Mb/s, then 52 bits of data will actually be "on the wire" at any given time. The receiver, however will only be aware of the 1 bit that is actually arriving at the receiver at that instant.

If the transmitter is sending bits at 100 Mb/s, then the receiver must receive and decode these bits at 100 Mb/s. The length of the wire changes the latency time between these two events, but it has nothing to do with the rate at which the receiver must deal with the incoming data.

Usually the receiver doesn't deal with the incoming bits one at a time, doing calculations at 100,000,000 operations per second. Instead it simply queues the bits up into something like a shift register, and then operates on them at a much lower rate, maybe 12.5 million operations per second, but operating on full bytes with each operation (or even at slower rates, but operating on larger data words).

"Contamination delay" seems to be a new term for what we old-timers used to call "minimum propagation delay". It's the minimum time from when the input crosses its first threshold to when the output crosses its first threshold.

Similarly, "propagation delay" is what I would call "maximum propagation delay". This would be the time from when the input crosses its final threshold until the output crosses its final threshold.

There may be different numbers for high-to-low and low-to-high transitions.

I'm not sure why your diagram shows different threshold levels for inputs vs. outputs. Perhaps that's intended to account for noise margins within the circuitry.

For the first transition, with the output going high-to-low:

• t_PHL(MIN) = 80 ps (contamination delay)
• t_PHL(MAX) = 180 ps (propagation delay)

For the second transition, with the output going low-to-high:

• t_PLH(MIN) = 60 ps (contamination delay)
• t_PLH(MAX) = 100 ps (propagation delay)

When accounting for propagation delays through a chain of logic, you have to assume that any given node is "undefined" between the two delay values for a given transition.