3.3vi2c
I'm trying to avoid the use of a level shifter in a design, but it would unfortunately require that I communicate at different voltage levels than what I power the device at.
If I communicate with a sensor from a microcontroller with 3.3V logic level I2C lines, but I power that sensor at 1.8V, am I in for big trouble (permanent damage to the device, inability to communicate)?
According to version 4 of the \$\mathrm{I^2C}\$ spec,
"Due to the variety of different technology devices (CMOS, NMOS, bipolar) that can be connected to the I2C-bus, the levels of the logical ‘0’ (LOW) and ‘1’ (HIGH) are not fixed and depend on the associated level of VDD. Input reference levels are set as 30 % and 70 % of VDD; VIL is 0.3VDD and VIH is 0.7VDD. See Figure 38, timing diagram. Some legacy device input levels were fixed at VIL = 1.5 V and VIH = 3.0 V, but all new devices require this 30 %/70 % specification. See Section 6 for electrical specifications." (page 9)
Deeper in the spec, you'll see that this \$ 0.7 \times V_{DD}\$ is the minimum logic high voltage:
For your 5V system:
\$ 0.7 \times 5 V = 3.5 V\$
\$ 0.3 \times 5 V = 1.5 V\$
To me, the 3.3 V pull-up looks marginal, especially if any of your 5V devices use the 'new' standard of \$ 0.7 \times V_{DD}\$ for logic HIGH.
Your mileage may vary, but it's always best to be within the spec wherever possible...
It can be easy to level shift the I2C signals between two voltage domains using any one of a number of different buffer parts that are made specifically for this purpose. However for most applications there is another discrete solution that works very well as shown below.
This solution will be lower cost to implement as long as you do not need additional buffering of the I2C bus. If buffering for long buses or excess capacitance or going between boards is needed then it is recommended to look into the chip type buffer solution.
You can gain additional information and understanding from the NXP (formerly Philips) application note on Bi-directional Level Shifters.
Best Answer
Yes, you will almost certainly run into problems. From your datasheet:
A spec like this most likely indicates the presence of ESD protection diodes on the SCL and SDA lines, connecting them to the power and ground rails.
If you power this with 1.8 V, and connect SCL (for example) through a pull-up resistor to 3.3 V, it will pull the SCL line down to about 2.5 V. This could cause problems with other chip recognizing a high voltage on SCL. The extra current from SCL into the VDDIO supply could cause other unexpected (and unpredictable) behavior.
It may be possible to operate your sensor with VDDIO at 3.3 V while the main VDD is at 1.8 V. I don't see anything to prevent it listed in the characteristics tables, but I didn't read the complete datasheet to be sure.