Oscillator – Fixing 4-bit Counters Not Working Properly

1: the capacitor circled in red is optional, that is why there is a jumper link there. According to page 7 in the pin description tables:

"The regulator requires a decoupling capacitor of 100 nF typical, which is connected from CAP/2.5V to DGND"

Therefore, just use the 100nf cap.

2: AS before, in the pin function table page 8 the COMP pin needs that cap because: "DAC Bias Pin. This pin is used for decoupling the DAC bias voltage"

3: The two blue capacitors on the IOUT pins are usually not loaded, as the schematic suggests "DNI" or "DNL" means do not load (its not normal to have it there). If you had a mostly DC output and there is high frequency noise issues on the output, i guess you could put those there to give a cleaner output.

4: The yellow power supply AVDD and DVDD are indeed power supply decoupling capacitors. You should place these on PCB close to the IC pins associated with those supply rails. C6 and C7 should be placed as close as possible to Pin 2 of the IC. C8 and C9 should be placed as close as possible to Pin 1 of the IC.

5: In the schematic of the datasheet at the end, the one that you have referenced and blocked out some parts - there is a clock generator IC, or an optional CLK input pin. This means the chip doesnt actually have a proper crystal driver inside. You cannot therefore give it a crystal with load caps (usually in the 18-33pF range) because it cannot drive the signal itself. You must supply it with an externally generated clock signal. Description for Pin 5 (MCLK) is as follows:

"Digital Clock Input. DDS output frequencies are expressed as a binary fraction of the frequency of MCLK. The output frequency accuracy and phase noise are determined by this clock."

So you must give it a proper clock, not a crystal (analog style clock i supposed you could consider a crystal)

6: good luck mate! Following the evaluation board schematic is a safe bet. Any other questions, don't hesitate to ask.

Several issues.

1) You claim to have copied the circuit you linked, but you didn't - you've failed to include the Schmitt trigger, typically a 7414. Without this buffering, your switch should not work on a button push, only on a release.

2) Your reset, pin 1, needs a 1k pullup from pin 1 to +5.

3) Pins 7, 9, and 10 should be tied together and pulled to +5 through another 1k resistor.

As a matter of principle, ALL unused inputs of a logic IC need to be connected to something. This is not always true of 7400 circuits, but it will be critical when you graduate to CMOS, such as 74HC chips. Get into the habit now.

Finally, you should not count on TTL outputs driving high, as you have shown. TTL works much better pulling loads down. So your outputs should be connected like

^{simulate this circuit – Schematic created using CircuitLab}

You may object that this will provide LEDs which are on when the output is low, and off when the outputs are high, which is confusing. True enough. In that case, invert the signals going to your LEDs. Since you already need one section of a 7414, and there are 6 gates per IC, you simply go

^{simulate this circuit}