Input Leakage Current
To determine your resistors voltage drop from the gate you need to use the leakage current from the datasheet. Microchip specifies an "Input Leakage Current" on their datasheets. The [datasheet that I have looked up][1] specifies an input leakage current of 1uA. This could cause a .1V or 100mV, which is only double what Robert calculated, probably not a problem on your signal.
Now remember, if you are dividing a 30V signal down to 30/11 (2.7v) volts full read then the 100mV is added to this, causing up to 3% error on your 30V signal.
If you need a resolution of 1V, divide that by 11 and then add the 100mV. This 100mV could be larger than the 1V signal.
Input Capacitance
Robert is correct, there will be a capacitance, but this really specifies an amount of time that is needed to take the ADC measurement. This also, combined with the input resistance you chose, creates a low pass filter; if you were wanting to measure signals with a higher frequency, you are not going to be able to capture them.
Reducing the error
The easiest way is to either reduce your resistance on your divider, or to buffer your signal. When you buffer the signal you will replace the PIC's leakage current with your op-amps leakage current which you can get quite low.
This 1uA is a worst case, unless it costs you a large amount to make minor changes to the design, fab your design and test how bad it is for you.
Please let me know if there is anything I can do to make this easier to read.
Yes, from the datasheet:
Due to the analog input resistive divider formed by R1
and R2 in Figure 5, any significant analog input source
resistance (R SOURCE) results in gain error. Furthermore, R SOURCE causes distortion due to nonlinear
analog input currents. Limit RSOURCE to a maximum
of 100Ω.
So practically, this means you need to drive the input with an amplifier. Although, a resistor divider made with a 192 Ω and 200 Ω resistor will meet specs if your signal has a low output impedance.
Best Answer
A simple model to show how an ADC behaves is this:
simulate this circuit – Schematic created using CircuitLab
There, you have a source (\$V_{\text{Analog}}\$) and its impedance (\$R_{\text{Source}}\$). As well as the internal model for an ADC with a switch which is open and close every sampling period, and the ADC's impedance which is a combination of \$R_{\text{ADC}}\$, \$C_{\text{Hold}}\$ and the leakage current.
The ADC also has a successive approximation register (SAR), which does a binary search to map the analog voltage value to a binary number.
Back to your question. When the switch is closed, the capacitor, \$C_{\text{Hold}}\$, starts to charge and the time its going to take depends on the impedances and the capacitance value.
If we neglect the leakage for a second and resort to the well-known charging equation for a capacitor, you get:
$$ V_{C_{\text{HOLD}}}=V_{\text{Analog}}\bigg(1-e^{-\dfrac{t}{\tau}}\bigg)$$
Where \$\tau=(R_{\text{Analog}}+R_{\text{ADC}})C_{\text{HOLD}}\$
The time it takes to fully charge the capacitor is about 5\$\tau\$. With that, the problem arises when the sampling time is not enough to allow the capacitor to fully charge.
For example, say your ADC samples (\$T_s\$) every 1ms, and consider your source impedance \$R_{\text{Analog}}\$ to be very small compared to \$R_{\text{ADC}}\$. In that case, it could make sense to approximate \$\tau\$ to be:
$$ \tau\approx (R_{\text{ADC}})C_{\text{HOLD}} $$
And just to make up an number say, after plugging in values for \$R_{\text{ADC}}\$ and \$C_{\text{HOLD}}\$, \$\tau\$ turns out to be:
$$ \tau\approx 0.15\text{ms} $$
Since the sample time is greater than 5\$\tau\$, that is plenty of time for the capacitor to fully charge, and your ADC should capture the correct value. At sampling period, the switch is opened.
Now, as your source impedance starts to increase, so does \$\tau\$. Say your source impedance, \$R_{\text{Analog}}\$ increases so that now you can't neglect it and say this leads to \$\tau=1\text{ms}\$. Under this condition (\$\tau=T_s\$), every time you sample, the capacitor value will be at approximately 63% of the actual value of the analog source. That would lead to an incorrect measurement.
It's about giving it enough time to charge up the holding capacitor and the source impedance, as it increases, prevents you from doing so.